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AD9625

Data Sheet

Pin No.

Mnemonic

Type

Description

DRVDD1

Power

Serial Digital Power Supply (1.3 V).

SERDOUT[7]+

Output

Lane 7 CML Output Data, True.

SERDOUT[6]+

Output

Lane 6 CML Output Data, True.

SERDOUT[5]+

Output

Lane 5 CML Output Data, True.

SERDOUT[4]+

Output

Lane 4 CML Output Data, True.

DRVDD1

Power

Serial Digital Power Supply (1.3 V).

SERDOUT[3]+

Output

Lane 3 CML Output Data, True.

SERDOUT[2]+

Output

Lane 2 CML Output Data, True.

SERDOUT[1]+

Output

Lane 1 CML Output Data, True.

N10

SERDOUT[0]+

Output

Lane 0 CML Output Data, True.

N11

DRVDD1

Power

Serial Digital Power Supply (1.3 V).

N12

VP_BYP

Input

Voltage Bypass.

N13, N14

DRVDD2

Power

Power Supply (2.5 V) Reference Clock Divider for SYNCINB±, DIVCLK±.

DRVDD1

Power

Serial Digital Power Supply (1.3 V).

SERDOUT[7]−

Output

Lane 7 CML Output Data, Complement.

SERDOUT[6]−

Output

Lane 6 CML Output Data, Complement.

SERDOUT[5]−

Output

Lane 5 CML Output Data, Complement.

SERDOUT[4]−

Output

Lane 4 CML Output Data, Complement.

DRVDD1

Power

Serializer Digital Power Supply (1.30 V).

SERDOUT[3]−

Output

Lane 3 CML Output Data, Complement.

SERDOUT[2]−

Output

Lane 2 CML Output Data, Complement.

SERDOUT[1]−

Output

Lane 1 CML Output Data, Complement.

P10

SERDOUT[0]−

Output

Lane 0 CML Output Data, Complement.

P11

DRVDD1

Power

Serializer Digital Power Supply (1.30 V).

P12

DRGND

Ground

Digital Driver Ground Supply. This pin connects to the digital driver ground plane.

P13

DIVCLK−

Output

Divide-by-4 Reference Clock LVDS, Complement.

P14

DIVCLK+

Output

Divide-by-4 Reference Clock LVDS, True.

Table 9. Pin Function Descriptions (By Function)1

Pin No.

Mnemonic

Type

Description

General Power and Ground Supply Pins

A1 to A3, A5, A8, A11, B1 to B4, B6, B8 to B11,

B13, B14, C1 to C5, C7, C9, C10, C12, C13, D5,

D6, D9, D10, E6, E9, E10, E13, E14, F6, F9, F10,

F13, G6, G9, G10, G13, H6, H9, H10, H13, H14,

J9, J10, J13, K5 to K13, L13, L14

AGND

Ground

ADC Analog Ground. These pins connect to the analog

ground plane.

RBIAS_EXT

Input

Reference Bias. This pin requires an external 10 kΩ resistor

connected to ground.

Clock Pins

F14

CLK+

Input

ADC Clock Input, True.

G14

CLK−

Input

ADC Clock Input, Complement.

ADC Analog Power and Ground Supplies Pins

A6, A13, A14, B7, B12, C8, C11, D8, D11, E8,

E11, F8, F11, G8, G11, H8, H11, J8, J11

AVDD2

Power

ADC Analog Power Supply (2.50 V).

A4, B5, C6, C14, D7, D12 to D14, E7, E12, F7,

F12, G7, G12, H7, H12, J7, J12

AVDD1

Power

ADC Analog Power Supply (1.30 V).

A12

VM_BYP

Input

Voltage Bypass.

A1 to A3, A5, A8, A11, B1 to B4, B6, B8 to B11,

B13, B14, C1 to C5, C7, C9, C10, C12, C13,D5,

D6, D9, D10, E6, E9, E10, E13, E14, F6, F9, F10,

F13, G6, G9, G10, G13, H6, H9, H10, H13, H14,

J9, J10, J13, K5 to K13, L13, L14

AGND

Ground

ADC Analog Ground. These pins connect to the analog

ground plane.

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