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DDC114IRTCRG3 Datasheet(PDF) 5 Page - Texas Instruments

Part # DDC114IRTCRG3
Description  Quad Current Input, 20-Bit Analog-To-Digital Converter
PDF  37 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DDC114IRTCRG3 Datasheet(HTML) 5 Page - Texas Instruments

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DDC114
SBAS255C − JUNE 2004 − REVISED APRIL 2009
www.ti.com
5
PIN CONFIGURATIONS
Top View
QFN
36
35
34
33
32
31
30
29
28
27
26
25
DIN
DIN
NC
NC
RESET
TEST
DGND
DGND
AGND
AVDD
AGND
AGND
1
2
3
4
5
6
7
8
9
10
11
12
DOUT
DOUT
CLK_4X
FORMAT
HISPD/LOPWR
RANGE0
RANGE1
RANGE2
AGND
VREF
AGND
AGND
48
47
46
45
44
43
42
41
40
39
38
13
14
15
16
17
18
19
20
21
22
23
37
24
DDC114
PIN DESCRIPTIONS
PIN
NUMBER
FUNCTION
DESCRIPTION
DOUT
1
Digital Output
Serial Data Output
DOUT
2
Digital Output
Serial Data Output: Complementary Signal
CLK_4X
3
Digital Input
Master Clock Divider Control: 0 = divide by 1, 1 = divide by 4
FORMAT
4
Digital Input
Digital Output Word Format: 0 = 16 Bits, 1 = 20 Bits
HISPD/LOPWR
5
Digital Input
Mode Control: 0 = Low-Power, 1 = High-Speed
RANGE0
6
Digital Input
Range Control 0 (least significant bit)
RANGE1
7
Digital Input
Range Control 1
RANGE2
8
Digital Input
Range Control 2 (most significant bit)
AGND
9, 11-14, 16, 18-20,
22, 24-26, 28
Analog
Analog Ground
VREF
10
Analog Input
External Voltage Reference Input, 4.096V Nominal
AIN4
15
Analog Input
Analog Input 4
AIN3
17
Analog Input
Analog Input 3
AIN2
21
Analog Input
Analog Input 2
AIN1
23
Analog Input
Analog Input 1
AVDD
27
Analog
Analog Power Supply, 5V Nominal
DGND
29, 30, 38, 41, 43, 45,
47, 48
Digital
Digital Ground
TEST
31
Digital Input
Test Mode Control
RESET
32
Digital Input
Resets the Digital Circuitry, Active Low
NC
33, 34
—
No Connection
DIN
35
Digital Input
Serial Data Input: Complementary Signal (optional, see text on page 13)
DIN
36
Digital Input
Serial Data Input
DVDD
37
Digital
Digital Power Supply, 3V Nominal
DCLK
39
Digital Input
Serial Data Clock Input: Complementary Signal (optional, see text on page 13)
DCLK
40
Digital Input
Serial Data Clock Input
CLK
42
Digital Input
Master Clock Input
DVALID
44
Digital Output
Data Valid Output, Active Low
CONV
46
Digital Input
Conversion Control Input: 0 = Integrate on Side B, 1 = Integrate on Side A



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