ML7406 datasheet(73/104 Pages) ETC2

73 / 104 page

FEDL7406-02

ML7406

73/104

[ED value 1time IDLE detection case]

(Note)

*1 During CCA operation, if set bandwidth to be extended (default is not extended), enabling filter stabilization time by

setting CCA_MASK_EN([CCA_MASK_SET: B2 0x7E(4)]) = 0b1. Stabilization time should be 1 ADC conversion time.

If this register is enabled, input operation is suspended until filter become stable.

AD conversion (16μs)

0b10(on-going)

ED1

ED13

ED2

ED14

(0)

0b00(IDLE)

INVALID

Do not average

CCA execution period(Min.16μs+224μs=240μs)

0x001

0x000

0x002

IDLE detection period(224μs)

< CCA_TH

(1)

(2)

ED3

0x00C 0x00D 0x00E

(12)

(13)

(14)

If IDLE_WAIT=0x000,

IDLE detection here.

ED0

ED value average

period(16μs)

(average ED value < CCA_LVL)

continue for AD conversion

period 14 times (224

μs) , then

IDLE detection done.

ED value

(Internal signal)

CCA_RSLT[1:0]

[CCA_CTRL: B0 0x39(1-0)]

INT[18] (CCA completion)

[INT_SOURCE_GRP3: B0 0x0F(2)]

CCA_EN

[CCA_CTRL: B0 0x39(4)]

ED_VALUE[7:0]

[ED_RSLT: B0 0x3A]

IDLE_WAIT[9:0]

[IDLE_WAIT_L/H;B0 0x3C/3B]

[Condition]

CCA normal mode

ADC_CK_SEL([ADC_CLK_SET: B0 0x08(4)])=0b1 (2MHz)

ED_AVG[2:0]([ED_CTRL: B0 0x41(2-0)])=0b000 (ED value 1 time average)

IDLE_WAIT[9:0]([IDLE_WAIT_L: B0 0x3C/H: B0 0x3C/3B(1-0)])=0b00_0000_1110 (IDLE detection period 224μs)

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