ML7406 datasheet(77/104 Pages) ETC2

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FEDL7406-02

ML7406

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●Other Functions

○Data rate setting function

(1) Data rate change setting

ML7406 supports various TX/RX data rate setting defined by the following registers.

TX: [TX_RATE_H: B1 0x02] and [TX_RATE_L: B1 0x03] registers

RX: [RX_RATE1_H: B1 0x04], [RX_RATE1_L: B1 0x05] and [RX_RATE2: B1 0x06] registers

TX/RX data rate can be defined in the following formula.

[TX]

TX data rate [bps] = round (26MHz / 13/ TX_RATE[11:0])

Recommended values for each data rate are in the table below. Registers value below are automatically set to

[TX_RATE_H],[ TX_RATE_L] registers by setting TX_DRATE[3:0] ([DRATE_SET: B0 0x06(3-0)]).

TX data rate [kbps]

[TX_RATE_H][ TX_RATE_L]

Data rate deviation

[%] *1

1.2

1667d

-0.02

2.4

833d

0.04

4.8

417d

-0.08

9.6

208d

0.16

32.768

61d

0.06

40d

0.00

100

20d

0.00

200

10d

0.00

300

3.17

400

0.00

500

0.00

*1 Data rate deviation is assumption that frequency deviation of master clock(26MHz crystal oscillator or TCXO or SPXO) is

0ppm.

[RX]

RX data rate [bps] = round (26MHz / {RX_RATE1[11:0] ×[RX_RATE2[6:0]})

Recommended values for each data rate are in the table below. Registers value below are automatically set to

[RX_RATE1_H][ RX_RATE1_L] [RX_RATE2] registers by setting RX_DRATE[3:0]( [DRATE_SET:B0 0x06(7-4)] ).

RX dta rate [kbps]

[RX_RATE1_H][RX_RATE1_L]

[RX_RATE2]

1.2

169d

2.4

85d

4.8

42d

9.6

21d

32.768

11d

72d

65d

100

65d

200

26d

300

29d

400

32d

500

26d

(Note)

When LOW_RATE_EN([CLK_SET2:B0 0x03(0)])=0b1, [RX_RATE1_H/L] and [RX_RATE2] registers are not set

automatically by setting RX_DRATE[3:0]. Please calcurate appropriate values by replacing the 8.66MHz to 26MHz in the

above formula and set them to each register.

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