HT82K68 datasheet(10/40 Pages) HOLTEK

10 / 40 page

HT82K68E

August 8, 2000

Preliminary

(STATUS;0AH), the Interrupt Control register

(INTC;0BH), the timer counter register

(TMR;0DH), the timer counter control register

(TMRC;0EH), the I/O registers (PA;12H,

PB;14H, PC;16H, PD;18H, PE;1AH) and the I/O

control registers (PAC;13H, PBC;15H, PCC;17H,

PDC;19H, PEC;1BH). The remaining space be-

fore the 60H is reserved for future expanded us-

age and reading these locations will get the result

00H. The general purpose data memory, ad-

dressed from 60H to FFH, is used for data and

control information under instruction com-

mand.

All data memory areas can handle arithmetic,

logic, increment, decrement and rotate opera-

tions directly. Except for some dedicated bits,

each bit in the data memory can be set and re-

set by the SET [m].i and CLR [m].i instructions,

respectively. They are also indirectly accessible

through Memory pointer registers (MP0;01H,

MP1;03H).

Indirect addressing register

Location 00H and 02H are indirect addressing

registers that are not physically implemented.

Any read/write operation of [00H] and [02H]

can access the data memory pointed to by MP0

(01H) and MP1 (03H) respectively. Reading lo-

cation 00H or 02H indirectly will return the re-

sult 00H. Writing indirectly results in no

operation.

The function of data movement between two in-

direct addressing registers is not supported.

The memory pointer registers, MP0 and MP1,

are 8-bit registers which can be used to access

the data memory by combining corresponding

indirect addressing registers.

Accumulator

The accumulator is closely related to the ALU

operations. It is also mapped to location 05H of

the data memory and is capable of carrying out

immediate data operations. The data move-

ment between two data memory locations must

pass through the accumulator.

Arithmetic and logic unit - ALU

This circuit performs 8-bit arithmetic and logic

operation. The ALU provides the following func-

tions:

· Arithmetic operations (ADD, ADC, SUB,

SBC, DAA)

· Logic operations (AND, OR, XOR, CPL)

· Rotation (RL, RR, RLC, RRC)

· Increment and Decrement (INC, DEC)

· Branch decision (SZ, SNZ, SIZ, SDZ ....)

The ALU not only saves the results of a data op-

eration but also changes the status register.

Status register - Status

The 8-bit status register (0AH) contains the

zero flag (Z), carry flag (C), auxiliary carry flag

(AC), overflow flag (OV), power down flag (PD)

and watch dog time-out flag (TO). The status

but also controls the operation sequence.

With the exception of the TO and PD flags, bits

in the status register can be altered by instruc-

tions like most other registers. Any data writ-

ten into the status register will not change the

TO or PD flags. It should be noted that opera-

tions related to the status register may give dif-

ferent results from those intended. The TO and

PD flags can only be changed by system power

up, Watchdog Timer overflow, executing the

HALT instruction and clearing the Watchdog

Timer.

The Z, OV, AC and C flags generally reflect the

status of the latest operations.

In addition, on entering an interrupt sequence

or executing a subroutine call, the status regis-

ter will not be automatically pushed onto the

stack. If the contents of status are important

and if the subroutine can corrupt the status

properly.

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