HT82K68 datasheet(18/40 Pages) HOLTEK

18 / 40 page

HT82K68E

August 8, 2000

Preliminary

Each I/O line has its own control register (PAC,

PBC, PCC, PDC, PEC) to control the input/out-

put configuration. With this control register,

CMOS output or schmitt trigger input with or

without pull-high resistor (mask option) struc-

tures can be reconfigured dynamically (i.e.,

on-the-fly) under software control. To function as

an input, the corresponding latch of the control

will exhibit automatically if the pull-high option

is selected. The input source(s) also depend(s) on

the control register. If the control register bit is

²1², input will read the pad state. If the control

move to the internal bus. The latter is possible in

²read-modify-write² instruction. For output func-

tion, CMOS is the only configuration. These con-

trol registers are mapped to locations 13H, 15H,

17H, 19H and 1BH.

After a chip reset, these input/output lines stay

at high levels or floating (mask option). Each

bit of these input/output latches can be set or

cleared by the SET [m].i or CLR [m].i (m=12H,

14H, 16H, 18H or 1AH) instruction.

Some instructions first input data and then fol-

low the output operations. For example, the

SET [m].i, CLR [m].i, CPL [m] and CPLA [m]

instructions read the entire port states into the

CPU, execute the defined operations

(bit-operation), and then write the results back

to the latches or the accumulator.

Each line of port A and port C [0:3] has the capa-

bility to wake-up the device.

V DD

Da t a B u s

W r i t e C ont r o l R egi s t er

C h i p R es et

R ead C o n t r o l R e g i s t er

Wr i t e I / O

R ead I / O

S y s t em W ak e- up

( P A & P C 0~ P C 3 onl y )

W eak

Pu l l - u p

PA 0 ~ P A 7

PB 0 ~ P B 7

R O M C ode O p t i on

PC 0 ~ PC 7

PD 0 ~ PD 7

PE 0 ~ P E 4

R O M C ode O p t i on

Input/output ports

HT82K68 Datasheet(PDF) 18 Page - Holtek Semiconductor Inc

HT82K68 Datasheet(HTML) 18 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

Datasheet Download

Link URL