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HDMP-1024 Datasheet(PDF) 21 Page - Agilent(Hewlett-Packard)

Part # HDMP-1024
Description  Low Cost Gigabit Rate Transmit/Receive Chip Set with TTL I/Os
PDF  40 Pages
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Manufacturer  HP [Agilent(Hewlett-Packard)]
Direct Link  http://www.home.agilent.com
Logo HP - Agilent(Hewlett-Packard)

HDMP-1024 Datasheet(HTML) 21 Page - Agilent(Hewlett-Packard)

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636
Rx I/O Definition (cont’d.)
Name
Pin
Type
Signal
SMRST0*
28
I-TTL
State Machine Reset Inputs: Each of these active-low input pins
SMRST1*
29
reset the Rx state machine to the initial start-up state. This initiates
a complete PLL restart and handshake at both ends of the duplex
link. Normally, SMCRST0* is connected to a power-up reset circuit
or a host system reset signal. The SMCRST1* input is normally
connected to the Tx LOCKED output. The LOCKED signal holds the
state-machine in the start-up state until the Tx PLL is locked.
STAT0
27
O-TTL
State Machine Status Outputs: These outputs indicate the current
STAT1
26
state-machine state. They are used to directly control the Tx ED,
Tx FF, Rx FDIS, and Rx ACTIVE lines.
STRBOUT
35
O-TTL
Recovered Frame-rate Data Clock Output: This output is the PLL
recovered frame rate clock. D0-D19, FLAG, DAV, CAV, FF, LINKRDY,
and ERROR should all be latched on the rising edge of STRBOUT.
TCLK
12
I-TTL
External VCO Replacement Test Clock: When TCLKSEL in
enabled, this input is used in place of the normal VCO signal,
effectively disabling the PLL and allowing the user to provide an
external retiming clock for testing.
TCLKSEL
10
I-ECL
Enable Test Clock Input: When this input is active, the TCLK,
TCLK* inputs are used in place of the normal VCO signal. This
feature is useful both for synchronous systems and for chip testing.
VCC
5S
Ground: Normally 5.0 volts. This power supply is used for all the
23
core logic other than the output drivers.
24
33
44
63
64
73
78
VCC_HS
13
S
High Speed Supply: Normally 5.0 volts. This ground is used to provide
clean references for the high speed DIN, DIN*, LIN, LIN* inputs.
VCCTTL
32
S
TTL Power Supply: Normally 5.0 volts. Used for all TTL receiver
52
output buffer cells.
53
72
GND
21
S
Power: Normally 0 volts. Tie to ground.
22
42
62
79
80
GNDTTL
31
S
TTL Power: Normally 0 volts. Tie to ground.
41
61
74



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