GMS81608PL datasheet(65/79 Pages) HYNIX

65 / 79 page

AC READING CHARACTERISTICS

(VSS=0 V, TA = 25°C ± 5°C)

Symbol

Item

Min

Typ

Max

Unit

Test condition

tAS

Address setup time

tOE

Data output delay time

200

tDH

Data hold time

NOTES:

1. VDD must be applied simultaneously or before VPP and removed simultaneously or after VPP.

AC PROGRAMMING CHARACTERISTICS

(VSS=0 V, TA = 25°C ± 5°C; See DC Characteristics Table for VDD and VPP voltages.)

Symbol

Item

Min

Typ

Max

Unit

Condition*

(Note 1)

tAS

Address set-up time

tOES

OE set-up time

tDS

Data setup time

tAH

Address hold time

tDH

Data hold time

tDFP

Output disable delay time

tVPS

VPP setup time

tVDS

VDD setup time

tPW

Program pulse width

0.95

1.0

1.05

tOPW

CE pulse width when over

programming

2.85

78.75

(Note 2)

tOE

Data output delay time

200

*AC CONDITIONS OF TEST

Input Rise and Fall Times (10% to 90%) . . . . 20 ns

Input Pulse Levels . . . . . . . . . . . . . . . 0.45V to 4.55V

Input Timing Reference Level

. . . . . . . . . 1.0V to 4.0V

Output Timing Reference Level

. . . . . . . . 1.0V to 4.0V

NOTES:

1. VDD must be applied simultaneously or before VPP and removed simultaneously or after VPP.

2. The length of the overprogram pulse may vary from 2.85 msec to 78.75 msec as a function of the iteration counter value X

(Intelligent Programming Algorithm).Refer to flow chart of page 13.

LG Semicon

GMS81608T PROGRAMMING SPECIFICATION

GMS81608PL Datasheet(PDF) 65 Page - Hynix Semiconductor

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