8018680188

80186

80188

Function

Format

Clock

Clock

Comments

Cycles

Cycles

DATA TRANSFER

(Continued)

CS

00101110

2

2

SS

00110110

2

2

DS

00111110

2

2

ES

00100110

2

2

ARITHMETIC

Regmemory with register to either

000000dw

mod reg r m

310

310

Immediate to registermemory

100000sw

mod000 r m

data

416

416

Immediate to accumulator

0000010w

data

34

34

816-bit

Regmemory with register to either

000100dw

mod reg r m

310

310

Immediate to registermemory

100000sw

mod010 r m

data

416

416

Immediate to accumulator

0001010w

data

34

34

816-bit

Registermemory

1111111w

mod000 r m

315

315

Register

01000 reg

3

3

Regmemory and register to either

001010dw

mod reg r m

310

310

Immediate from registermemory

100000sw

mod101 r m

data

416

416

Immediate from accumulator

0010110w

data

34

34

816-bit

Regmemory and register to either

000110dw

mod reg r m

310

310

Immediate from registermemory

100000sw

mod011 r m

data

416

416

Immediate from accumulator

0001110w

data

34

34

816-bit

Registermemory

1111111w

mod001 r m

315

315

Register

01001 reg

3

3

Registermemory with register

0011101w

mod reg r m

310

310

Register with registermemory

0011100w

mod reg r m

310

310

Immediate with registermemory

100000sw

mod111 r m

data

310

310

Immediate with accumulator

0011110w

data

34

34

816-bit

Change sign registermemory

1111011w

mod011 r m

310

310

ASCII adjust for add

00110111

8

8

Decimal adjust for add

00100111

4

4

ASCII adjust for subtract

00111111

7

7

Decimal adjust for subtract

00101111

4

4

Multiply (unsigned)

1111011w

mod 100 r m

Register-Byte

26–28

26–28

Register-Word

35–37

35–37

Memory-Byte

32–34

32–34

Memory-Word

41–43

41–43

Shaded areas indicate instructions not available in 8086 8088 microsystems

NOTE

Clock cycles shown for byte transfers for word operations add 4 clock cycles for each memory transfer

28

28