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80C187 Datasheet(PDF) 11 Page - Intel Corporation

Part # 80C187
Description  80-BIT MATH COPROCESSOR
PDF  30 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

80C187 Datasheet(HTML) 11 Page - Intel Corporation

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80C187
Table 6 Exceptions
Exception
Cause
Default Action
(If Exception is Masked)
Invalid
Operation on a signalling NaN
Result is a quiet NaN
Operation
unsupported format indeterminate
integer indefinite or
form (0 % 00) (a %)
BCD indefinite
a
(b %) etc) or stack
overflowunderflow (SF is also set)
Denormalized
At least one of the operands is
The operand is normalized
Operand
denormalized ie it has the smallest
and normal processing
exponent but a nonzero significand
continues
Zero Divisor
The divisor is zero while the dividend
Result is %
is a noninfinite nonzero number
Overflow
The result is too large in magnitude
Result is largest finite
to fit in the specified format
value or %
Underflow
The true result is nonzero but too small
Result is denormalized
to be represented in the specified format and
or zero
if underflow exception is masked denormalization
causes loss of accuracy
Inexact
The true result is not exactly representable
Normal processing
Result
in the specified format (eg 13)
continues
(Precision)
the result is rounded according to the
rounding mode
Initialization
After FNINIT or RESET the control word contains
the value 037FH (all exceptions masked precision
control 64 bits rounding to nearest) the same values
as in an 8087 after RESET For compatibility with the
8087 the bit that used to indicate infinity control (bit
12) is set to zero however regardless of its setting
infinity is treated in the affine sense After FNINIT or
RESET the status word is initialized as follows
 All exceptions are set to zero
 Stack TOP is zero so that after the first push the
stack top will be register seven (111B)
 The condition code C3–C0 is undefined
 The B-bit is zero
The tag word contains FFFFH (all stack locations
are empty)
80C18680C187 initialization software should exe-
cute an FNINIT instruction (ie an FINIT without a
preceding WAIT) after RESET The FNINIT is not
strictly required for 80C187 software
but Intel
recommends its use to help ensure upward compati-
bility with other processors
8087 Compatibility
This section summarizes the differences between
the 80C187 and the 8087 Many changes have been
designed into the 80C187 to directly support the
IEEE standard in hardware These changes result in
increased performance by elminating the need for
software that supports the standard
GENERAL DIFFERENCES
The 8087 instructions FENIFNENI and FDISI
FNDISI perform no useful function in the 80C187
Numeric Processor Extension They do not alter the
state of the 80C187 Numeric Processor Extension
(They are treated similarly to FNOP except that
ERROR is not checked) While 80868087 code
containing these instructions can be executed on
the 80C18680C187 it is unlikely that the exception-
handling routines containing these instructions will
be completely portable to the 80C187 Numeric Proc-
essor Extension
The 80C187 differs from the 8087 with respect to
instruction data and exception synchronization Ex-
cept for the processor control instructions all of the
80C187 numeric instructions are automatically syn-
chronized by the 80C186 CPU When necessary the
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