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80C187 Datasheet(PDF) 27 Page - Intel Corporation |
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80C187 Datasheet(HTML) 27 Page - Intel Corporation |
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27 / 30 page ![]() 80C187 80C187 EXTENSIONS TO THE CPU’s INSTRUCTION SET Instructions for the 80C187 assume one of the five forms shown in Table 12 In all cases instructions are at least two bytes long and begin with the bit pattern 11011B which identifies the ESCAPE class of instruction Instructions that refer to memory oper- ands specify addresses using the CPU’s addressing modes MOD (Mode field) and RM (RegisterMemory spec- ifier) have the same interpretation as the corre- sponding fields of CPU instructions (refer to Pro- grammer’s Reference Manual for the CPU) The DISP (displacement) is optionally present in instruc- tions that have MOD and RM fields Its presence depends on the values of MOD and RM as for in- structions of the CPU The instruction summaries that follow assume that the instruction has been prefetched decoded and is ready for execution that bus cycles do not require wait states that there are no local bus HOLD re- quests delaying processor access to the bus and that no exceptions are detected during instruction execution Timings are given in internal 80C187 clocks and include the time for opcode and data transfer between the CPU and the NPX If the in- struction has MOD and RM fields that call for both base and index registers add one clock Table 12 Instruction Formats Instruction Optional First Byte Second Byte Field 1 11011 OPA 1 MOD 1 OPB RM DISP 2 11011 MF OPA MOD OPB RM DISP 3 11011 d P OPA 1 1 OPB ST (i) 4 11011 0 0 1 1 1 1 OP 5 11011 0 1 1 1 1 1 OP 15–11 10 9 8 7 6 5 4 3 2 1 0 NOTES OP e Instruction opcode possibly split into two fields OPA and OPB MF e Memory Format 00 32-Bit Real 01 32-Bit Integer 10 64-Bit Real 11 16-Bit Integer d e Destination 0 Destination is ST(0) 0 Destination is ST(i) R XOR d e 0 Destination (op) Source R XOR d e 1 Source (op) Destination In FSUB and FDIV the low-order bit of OPB is the R (reversed) bit P e Pop 0 Do not pop stack 1 Pop stack after operation ESC e 11011 ST(i) e Register Stack Element i 000 e Stack Top 001 e Second Stack Element 111 e Eighth Stack Element 27 |
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