AD7147 datasheet(32/73 Pages) AD

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Data Sheet

AD7147

Rev. D | Page 31 of 72

GPIO INT OUTPUT CONTROL

The INT output signal can be controlled by the GPIO pin when

the GPIO is configured as an input. The GPIO is con-figured as

an input by setting the GPIO_SETUP bits in the interrupt con-

figuration register to 01. See the

section for more information on configuring the GPIO.

General-Purpose Input/Output

(GPIO)

Enable the GPIO interrupt by setting the GPIO_INT_ENABLE

bit in Register 0x007 to 1, or disable the GPIO interrupt by

clearing this bit to 0. The GPIO status bit in the conversion-

complete interrupt status register reflects the status of the GPIO

interrupt. This bit is set to 1 when the GPIO has triggered INT.

The bit is cleared upon reading the GPIO_INT_STATUS bit if the

condition that caused the interrupt is no longer present.

The GPIO interrupt can be set to trigger on a rising edge, falling

edge, high level, or low level at the GPIO input pin. Table 15 shows

how the settings of the GPIO_INPUT_CONFIG bits in the inter-

rupt enable (STAGE_LOW_INT_ENABLE) register affect the

behavior of INT.

Figure 43 to Figure 46 show how the interrupt output is cleared

upon a read from the GPIO_INT_STATUS bit.

GPIO

INPUT

INT

OUTPUT

SERIAL

READBACK

GPIO

INPUT

INT

OUTPUT

1READ GPIO_INT_STATUS BIT TO RESET INT OUTPUT.

GPIO INPUT HIGH WHEN REGISTER IS READ BACK

GPIO INPUT LOW WHEN REGISTER IS READ BACK

Figure 43. Example of INT Output Controlled by the GPIO Input

(GP IO_SETUP = 01, GPIO_INPUT_CONFIG = 00)

GPIO

INPUT

INT

OUTPUT

SERIAL

READBACK

GPIO

INPUT

INT

OUTPUT

1READ GPIO_INT_STATUS BIT TO RESET INT OUTPUT.

GPIO INPUT HIGH WHEN REGISTER IS READ BACK

GPIO INPUT LOW WHEN REGISTER IS READ BACK

Figure 44. Example of INT Output Controlled by the GPIO Input

(GPIO_SETUP = 01, GPIO_INPUT_CONFIG = 01)

AD7147 Datasheet(PDF) 32 Page - Analog Devices

AD7147 Datasheet(HTML) 32 Page - Analog Devices

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