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UPD70741 Datasheet(PDF) 96 Page - NEC |
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UPD70741 Datasheet(HTML) 96 Page - NEC |
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96 / 112 page  µPD70741 96 (7) DRAM, CBR refresh timing Parameter Symbol Conditions MIN. MAX. Unit READY setup time (relative to CLKOUT ↑) 24 tSRYK 6ns READY hold time (relative to CLKOUT ↑) 25 tHKRY 6ns RAS pulse width 65 tRAS (w + 2.5)T - 20 ns CAS setup time 110 tCSR 1T - 20 ns CAS hold time 111 tCHR (w + 2.5)T - 20 ns Refresh pulse width 112 tREF (w + 2.5)T - 20 ns RAS precharge to CAS hold time 113 tRPC 4.5T - 20 ns REFRQ active delay (relative to CLKOUT ↑) 114 tDKREF 112 ns REFRQ inactive delay (relative to CLKOUT ↓) 115 tHKREF 112 ns Remark T: tCYK w: Wait state count for CBR refresh CLKOUT (output) READY (input) UCAS, LCAS (output) RAS (output) REFRQ (output) 24 25 24 25 65 114 115 112 111 113 110 110 TH TH TI TH TH TH TH TH TH Remark In the above timing chart, w = 1 is assumed. |
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