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UPD70741 Datasheet(PDF) 20 Page - NEC |
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UPD70741 Datasheet(HTML) 20 Page - NEC |
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20 / 112 page  µPD70741 20 3.4 Built-in Peripheral I/O Registers The built-in peripheral I/O registers are allocated to the 256-byte area between C0000000H and C00000FFH in the 1-Gbyte space between C0000000H and FFFFFFFFH. Starting from address C0000100H, 256-byte images are created every 256 bytes. The least significant bit of an address is not decoded. Thus, when byte access is attempted to a register at an odd address (2n+1), a register at an even address (2n) is actually performed. When 16-bit access is attempted to an 8-bit I/O register, the upper eight bits are ignored for write, and become undefined for read. Table 3-3 lists the built-in peripheral I/O registers. |
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