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UM0842 Datasheet(PDF) 31 Page - STMicroelectronics |
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UM0842 Datasheet(HTML) 31 Page - STMicroelectronics |
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31 / 50 page ![]() UM0842 CPU board hardware description Doc ID 16542 Rev 4 31/50 A.3 CPU board switch and jumper settings A.3.1 Switch 1 settings Note: When Switch SW1-x is in the ON position, the bit value is ’0’. When Switch 1 is in the OFF position, the bit value is ’1’. Bits 3, 4, 5 and 6 allow you to set the Functional configuration. The default configuration is Configuration 3 . For other configurations, please refer to the SPEAr320 user manual available on www.st.com/spear. Table 30. Switch 1 (SoC functional configuration) Bit Description 1 Test – see Debug configuration below 2 Reserved 3 Reserved 4 Reserved 5 Reserved 6 BootSel – see Debug configuration below Table 31. Switch 1 (debug configuration) Test bit Debug configuration 21 0 0 Normal Mode (No debug enabled) 0 1 ARM1 JTAG connected to J4 10 Reserved Table 32. Switch 1 (functional configuration) Test bit Functional configuration 6543 1011 Configuration 3 |
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