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LF3370 Datasheet(PDF) 19 Page - LOGIC Devices Incorporated |
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LF3370 Datasheet(HTML) 19 Page - LOGIC Devices Incorporated |
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19 / 24 page ![]() Video Imaging Products 19 LF3370 High-Definition Video Format Converter 03/13/2001–LDS.3370-F DEVICES INCORPORATED FIGURE 20.MATRIX MULTIPLIER/KEY SCALER COEFFICIENT BANK LOADING SEQUENCE WITH PAUSE IMPLEMENTATION ADDR1 COEF0 COEF1 CLK LD CF12-0 W1 W1: Matrix Multiplier/Key Scaler Coefficient Set updated and effective on this active rising clock edge. PAUSE COEF9 FIGURE 19.MATRIX MULTIPLIER/KEY SCALER COEFFICIENT BANK LOADING SEQUENCE ADDR1 COEF0 COEF2 COEF3 COEF4 COEF6 ADDR7 COEF8 CLK LD CF12-0 W1: Matrix Multiplier/Key Scaler Coefficient Set updated and effective on this active rising clock edge. W1 COEF5 COEF1 COEF9 FIGURE 18.LOOK-UP TABLE LOADING SEQUENCE ADDR1 N0 N2 N1023 CLK LD CF11-0 W1: LUT updated and effective on this rising clock edge. N1 N3 N4 N1019 N1021 N1020 N1022 W1 FIGURE 17.CONFIGURATION, INPUT/OUTPUT BIAS ADDER, RSL, AND HBLANK LEVEL REGISTER LOADING SEQUENCE ADDR1 DATA1 ADDR3 DATA4 CONFIG REG RSL REGISTER HBLANK LEVEL REGISTER CLK LD CF12-0 W2 W1: Configuration Register updated and effective on this rising clock edge. W3 W4 W2: Input or Output Bias Adder Register updated and effective on this rising clock edge. W3: RSL Register Set updated and effective on this rising clock edge. DATA1 DATA3 DATA2 ADDR4 DATA2 DATA1 IN/OUT BIAS REG ADDR2 DATA1 W4: Horizontal Blanking Level Register updated and effective on this rising clock edge. W1 |
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