FT905 datasheet(29/56 Pages) FTDI

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FT905

_6_7_8/6/7/8 Embedded Microcontroller Datasheet

Version 1.0

Document No.: FT_001131 Clearance No.: FTDI#422

4.14.1 Features:



Conform to v2.1 and v3.0 of the I2C specification.



Support flexible transmission speed modes.

Standard (up to 100 kb/s)

Fast (up to 400 kb/s)

Fast-plus (up to 1 Mb/s)

High-speed (up to 3.4 Mb/s)



I2C0 can be configured for Master or Slave mode.



Perform arbitration and clock synchronization.



Multi-master systems supported.



Support both 7-bit and 10-bit addressing modes on the I2C bus.



Support clock stretching.

4.15 UART Interface

The FT905 series contains two UART controllers with standard transmit and receive data lines.

UART0 provides a full modem control handshake interface and support for 9-bit data, allowing

automatic address detection while 9-bit data mode is enabled.

UART1 is a simplified programmable serial interface with CTS and RTS flow control logic, which

is pin muxed with UART0 and can only be used if UART0 is used in simple mode (CTS/RTS

only).

4.15.1 Features:



Maximum UART data bit rate of 8Mbit/s.



Supports UART mode and FIFO mode operation.



128 Bytes buffering both Receive and Transmit FIFOs used.



Software compatible with 16450, 16550, 16750 and 16950 industry standard.



Modem control function (CTS, RTS, DSR, DTR, RI, and DCD) support for UART0.



Programmable automatic out-of- band flow control logic through Auto-RTS and Auto-

CTS.



Programmable automatic flow control logic using DTR and DSR.



Programmable automatic in-band flow control logic using XON/XOFF characters.



Supports external RS-485 buffer enable.



Fully programmable serial interface characteristics:

5-, 6-, 7-, 8-, or 9-bit characters

Even, Odd, or No-parity bit generation and detection

1-, 1.5- (for 5 data bits only) or 2- (for 6/7/8 data bits) stop bit generation

Baud generation

Detection of bad data in Receive FIFO



Supports Transmitter and Receiver disable capability.

4.16 Timers and Watchdog Timer

The FT905 series has four 16-bit user timers with pre-scaling and a 32-bit watchdog feature.

The watchdog timer is controlled from the main clock. The watchdog can be initialized with a

5-bit register. The value of this register points to a bit of the 32-bit counter which will be set

by the application firmware. As the timer decrements an interrupt is signaled when the timer

rolls over. Once started and initialized the watchdog can’t be stopped. It can only be cleared by

writing into a register.

The four user timers can be controlled from the main clock or a common 16-bit pre-scaler,

which can be selected by each timer individually. These timers can be started, stopped and

cleared / initialized. The current value of all timers can be read from registers. All timers can

FT905 Datasheet(PDF) 29 Page - Future Technology Devices International Ltd.

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