FT905 datasheet(32/56 Pages) FTDI

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FT905

_6_7_8/6/7/8 Embedded Microcontroller Datasheet

Version 1.0

Document No.: FT_001131 Clearance No.: FTDI#422

4.21.2 Phase Locked Loop

The internal PLL takes a 12 MHz clock input from a crystal oscillator. The PLL outputs 100 MHz

system clock frequency to CPU processor and other peripheral circuits. Each peripheral has an

individual enable control signal to gate the clock source.

4.21.3 32.768 KHz RTC Oscillator

The RTC oscillator provides a clock to the RTC time counter. Either an external 32.768 KHz

crystal or a 32.768 KHz square wave clock can be used as clock source. The external crystal is

connected across RTC_XI/RTC_CLKIN and RTC_XIO in the configuration shown in Session 6.2.

The optional external clock input is connected to the RTC_XI/RTC_CLKIN pin directly.

4.21.4 Internal Slow Clock Oscillator

The FT905 internal slow clock oscillator provides at least 5ms slow clock source to generate an

interrupt for the USB2.0 device remote wake-up feature. A USB2.0 device with remote wake-

up capability may not generate resume signalling unless the bus has been continuously in the

idle state for 5ms. For a detailed description for USB2.0 suspend/resume, please refer to

USB2.0 specification chapter7.1.7.7.

4.22 Power Management

4.22.1 Power supply

The FT905 series may be operated with a single supply of +3.3V apply to VCCIO3V3,

VUSB3V3, VETH3V3 and VCC3V3A pins. The +1.2V internal regulator VOUT1 provides the

power to the core circuit after VCCIO3V3 power on and the system will generate a Power on

Reset (POR) pulse when the output voltage rises above the POR threshold.

The second +1.2V internal regulator VOUT2 will provide the power to the Ethernet transceiver

when VETH3V3 gets the power supply.

4.22.2 Power down mode

Power down mode applies to the entire system. In the power down mode, the system 12MHz

oscillator and PLL both switch off and the system clock to the core and all peripherals stop

except for the RTC oscillator and internal regulator. The internal regulator retains the power for

the core and RTC running.

An interrupt from GPIO or wake-up events from the USB2.0 peripheral controller and host

controller can wake-up the system from power down mode independently.

If the USB2.0 host controller was used and the respective interrupt bit enabled before the

system entered into power down mode, then the following events can wake-up the system.



Remote wake-up interrupt to USB2.0 host controller.



USB device connected interrupt to USB2.0 host controller.



USB device disconnected interrupt to USB2.0 host controller.



USB2.0 host controller detected the over-current (OC) protection event.

If the USB2.0 peripheral controller was used and the respective interrupt bit also enabled

before the system entered into power down mode, the following events can wake-up the

system.

FT905 Datasheet(PDF) 32 Page - Future Technology Devices International Ltd.

FT905 Datasheet(HTML) 32 Page - Future Technology Devices International Ltd.

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