S13D1 datasheet(12/45 Pages) SII

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SUPER-SMALL PACKAGE 2-CIRCUIT BUILT-IN DELAY FUNCTION HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR

S-13D1 Series

Rev.1.3_00

Seiko Instruments Inc.

Table 10 (2 / 2)

(Ta =

+25°C unless otherwise specified)

Item

Symbol

Condition

Min.

Typ.

Max.

Unit

Test

Circuit

Thermal shutdown

detection temperature

TSD

Junction temperature

−

160

−

°C

−

Thermal shutdown

release temperature

TSR

Junction temperature

−

130

−

°C

−

"L" output Nch

ON-resistance

(With discharge shunt

function)

RLOW

VIN = 5.5 V,

VOUT = 0.1 V

VOUT2 pin of C / F type

(with delay function)

−

4, 5

VOUT1 pin of C / F type

(with delay function)

B / E type

(without delay function)

−

4, 5

Delay time

(C / F type only)

tDELAY

VIN

≥ VOUT(S) + 1.0 V, ON / OFF1 pin and

ON / OFF2 pin are set to ON simultaneously,

RL = 1.0 k

Ω, CL1, CL2 = 0.22 μF

100

−

μs

*1.

VOUT(S): Set output voltage

VOUT(E): Actual output voltage

Output voltage when fixing IOUT (= 30 mA) and inputting VOUT(S)

+ 1.0 V

*2.

The output current at which the output voltage becomes 95% of VOUT(E) after gradually increasing the output current.

*3.

Vdrop = VIN1

− (VOUT3 × 0.98)

VOUT3 is the output voltage when VIN = VOUT(S)

+ 1.0 V and IOUT = 100 mA.

VIN1 is the input voltage at which the output voltage becomes 98% of VOUT3 after gradually decreasing the input

voltage.

*4.

A change in the temperature of the output voltage [mV/°C] is calculated using the following equation.

ΔVOUT

ΔTa []

mV/°C

*1 = V

OUT(S) []

*2 ×

ΔVOUT

ΔTa•VOUT []

ppm/°C

*3 ÷ 1000

*1.

Change in temperature of output voltage

*2.

Set output voltage

*3.

Output voltage temperature coefficient

*5.

The output current can be at least this value.

Due to restrictions on the package power dissipation, this value may not be satisfied. Attention should be paid to the

power dissipation of the package when the output current is large.

This specification is guaranteed by design.

*6.

Delay time shows the time period from when VOUT1 pin voltage reaches 50% of the set output voltage until VOUT2 pin

voltage reaches 50% of the set output voltage, when the ON / OFF1 pin and the ON / OFF2 pin are set to ON

simultaneously. Refer to "8. Delay function (S-13D1 Series C / F type)" in " Operation" for details.

S13D1 Datasheet(PDF) 12 Page - Seiko Instruments Inc

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