AM4376 datasheet(145/261 Pages) TI

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RMII[x]_REFCLK (input)

RMII[x]_RXD[1:0], RMII[x]_CRS_DV,

RMII[x]_RXER (inputs)

RMII[x]_REFCLK

(Input)

AM4376, AM4377, AM4378, AM4379

www.ti.com

SPRS851B – JUNE 2014 – REVISED APRIL 2015

5.12.7.1.3 Ethernet MAC and Switch RMII Electrical Data and Timing

Table 5-31. Timing Requirements for RMII[x]_REFCLK - RMII Mode

(see Figure 5-26)

NO.

MIN

TYP

MAX

UNIT

tc(REF_CLK)

Cycle time, REF_CLK

19.999

20.001

tw(REF_CLKH)

Pulse Duration, REF_CLK high

tw(REF_CLKL)

Pulse Duration, REF_CLK low

Figure 5-26. RMII[x]_REFCLK Timing - RMII Mode

Table 5-32. Timing Requirements for RMII[x]_RXD[1:0], RMII[x]_CRS_DV, and RMII[x]_RXER - RMII Mode

(see Figure 5-27)

NO.

MIN

TYP

MAX

UNIT

tsu(RXD-REF_CLK)

Setup time, RXD[1:0] valid before REF_CLK

tsu(CRS_DV-REF_CLK)

Setup time, CRS_DV valid before REF_CLK

tsu(RX_ER-REF_CLK)

Setup time, RX_ER valid before REF_CLK

th(REF_CLK-RXD)

Hold time RXD[1:0] valid after REF_CLK

th(REF_CLK-CRS_DV)

Hold time, CRS_DV valid after REF_CLK

th(REF_CLK-RX_ER)

Hold time, RX_ER valid after REF_CLK

Figure 5-27. RMII[x]_RXD[1:0], RMII[x]_CRS_DV, RMII[x]_RXER Timing - RMII Mode

Specifications

145

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