LP38859 datasheet(14/25 Pages) TI

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LP38859

SNVS337F – JUNE 2006 – REVISED SEPTEMBER 2015

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Tantalum capacitors also provide stable operation across the entire operating temperature range. However, the

effects of ESR may provide variations in the output voltage during fast load transients. Using the minimum

recommended 10-µF ceramic capacitor at the output allows unlimited capacitance, tantalum, and/or aluminum, to

be added in parallel.

8.2.2.1.2

Input Capacitor

The input capacitor must be at least 10 µF, but can be increased without limit. Its purpose is to provide a low

source impedance for the regulator input. A ceramic capacitor, X5R or X7R, is recommended.

Tantalum capacitors may also be used at the IN pin. There is no specific ESR limitation on the input capacitor

(the lower, the better).

Aluminum electrolytic capacitors can be used, but are not recommended as their ESR increases very quickly at

cold temperatures. They are not recommended for any application where the ambient temperature falls below

0°C.

8.2.2.1.3

Bias Capacitor

The capacitor on the BIAS pin must be at least 1 µF and can be any good-quality capacitor (ceramic is

recommended).

8.2.2.2 Power Dissipation and Heat-Sinking

Additional copper area for heat-sinking may be required depending on the maximum device dissipation (PD) and

the maximum anticipated ambient temperature (TA) for the device. Under all possible conditions, the junction

temperature must be within the range specified under operating conditions.

The total power dissipation of the device is the sum of three different points of dissipation in the device.

The first part is the power that is dissipated in the NMOS pass element, and can be determined with the formula:

PD(PASS) = (VIN – VOUT) × IOUT

(2)

The second part is the power that is dissipated in the bias and control circuitry, and can be determined with the

formula:

PD(BIAS) = VBIAS × IGND(BIAS)

where

•

IGND(BIAS) is the portion of the operating ground current of the device that is related to VBIAS.

(3)

The third part is the power that is dissipated in portions of the output stage circuitry, and can be determined with

the formula:

PD(IN) = VIN × IGND(IN)

where

•

IGND(IN) is the portion of the operating ground current of the device that is related to VIN.

(4)

The total power dissipation is then:

PD = PD(PASS) + PD(BIAS) + PD(IN)

(5)

The maximum allowable junction temperature rise (

ΔTJ) depends on the maximum anticipated ambient

temperature (TA) for the application, and the maximum allowable operating junction temperature (TJ(MAX)) .

ΔTJ = TJ(MAX) – TA(MAX)

(6)

The maximum allowable value for junction-to-ambient thermal resistance, RθJA, can be calculated using

Equation 7.

RθJA ≤ ΔTJ / PD

(7)

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