V

IN

A:EN

B:SCL

C:SDA

VSEL

GND

C2

A

B

C

TPS62650

TPS62651

SLVS808B

– AUGUST 2009 – REVISED JULY 2011

www.ti.com

LAYOUT CONSIDERATIONS

As for all switching power supplies, the layout is an important step in the design. High-speed operation of the

TPS6265x devices demand careful attention to PCB layout. Care must be taken in board layout to get the

specified performance. If the layout is not carefully done, the regulator could show poor line and/or load

regulation, stability and switching frequency issues as well as EMI problems. It is critical to provide a low

inductance, impedance ground path. Therefore, use wide and short traces for the main current paths.

The input capacitor should be placed as close as possible to the IC pins as well as the inductor and output

capacitor. In order to get an optimum ESL step, the output voltage feedback point (FB) should be taken in the

output capacitor path, approximately 1mm away for it. The feed-back line should be routed away from noisy

components and traces (e.g. SW line).

Figure 57. Suggested Layout (Top)

32

Copyright

© 2009–2011, Texas Instruments Incorporated