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TPS62650 Datasheet(PDF) 29 Page - Texas Instruments |
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TPS62650 Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 39 page ![]() TPS62650 TPS62651 www.ti.com SLVS808B – AUGUST 2009 – REVISED JULY 2011 CONTROL1 REGISTER DESCRIPTION Memory location: 0x02 Description RESERVED RESERVED FREE FREE MODE_CTRL[1:0] MODE1 MODE0 Bits D7 D6 D5 D4 D3 D2 D1 D0 Memory type R R R/W R/W R/W R/W R/W R/W Default value 0 0 0 0 0 0 0 0 Bit Description MODE_CTRL[1:0] Mode control bits.(1) 00: Operation follows MODE0, MODE1. 01: PFM/PWM operation independent of VSEL signal. 10: Forced PWM operation independent of VSEL signal. 11: PFM/PWM operation independent of VSEL signal. MODE1 VSEL high (roof voltage) operating mode selection bit. 0: Forced PWM. 1: PFM/PWM automatic transition. MODE0 VSEL low (floor voltage) operating mode selection bit. 0,1: PFM/PWM automatic transition (no effect). (1) See the ordering information table to verify the validity of this option. CONTROL2 REGISTER DESCRIPTION Memory location: 0x03 Description FREE OUTPUT_DISCHARGE PWROK FREE FREE DEFSLEW Bits D7 D6 D5 D4 D3 D2 D1 D0 Memory type R/W R/W R/W R/W R/W R/W R/W R/W Default value 0 1 0 0 0 1 1 1 Bit Description OUTPUT_ Output capacitor auto-discharge control bit. DISCHARGE 0: The output capacitor is not actively discharged when the converter is disabled. 1: The output capacitor is discharged through an internal resistor when the converter is disabled. PWROK Power good bit. 0: The output voltage is not within its regulation limits. 1: The output voltage is in regulation. DEFSLEW Output voltage slew-rate control bits. 000: 0.15mV/ μs 001: 0.3mV/ μs 010: 0.6mV/ μs 011: 1.2mV/ μs 100: 2.4mV/ μs 101: 4.8mV/ μs 110: 9.6mV/ μs 111: Immediate Copyright © 2009–2011, Texas Instruments Incorporated 29 |
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