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TPS65279V Datasheet(PDF) 29 Page - Texas Instruments |
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TPS65279V Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 46 page ![]() Current Sense I/V Converter V V ref 6 . 0 L i ESR R 1 R 2 R c R o C c C b C L R µs g M 1350 COMP VFB EA 1 C VOUT V A g mps / 10 = = = ESR b C R Co C R × = L C C R Co C R × = O L 1 (fp ) s C R 2 = × × × p 2 C M ps fc Vo Co R g Vref gm p × × × = × × TPS65279V www.ti.com SLVSBW1B – FEBRUARY 2013 – REVISED JANUARY 2014 Loop Compensation Integrated buck DC/DC converter in TPS65279V incorporates a peak current mode control scheme. The error amplifier is a transconductance amplifier with a gain of 1350 µA/V. A typical type II compensation circuit adequately delivers a phase margin between 60° and 90°. Cb adds a high frequency pole to attenuate high frequency noise when needed. To calculate the external compensation components, follow the following steps. 1. Select switching frequency fsw that is appropriate for application depending on L and C sizes, output ripple, EMI, and etc. Switching frequency between 500 kHz to 1 MHz gives best trade off between performance and cost. To optimize efficiency, lower switching frequency is desired. 2. Set up cross over frequency, fc, which is typically between 1/5 and 1/20 of fsw. 3. RC can be determined by: Where is the error amplifier gain (1350 µA/V) is the power stage voltage to current conversion gain (10 A/V). 4. Calculate CC by placing a compensation zero at or before the dominant pole: (16) (17) 5. Optional Cb can be used to cancel the zero from the ESR associated with CO. (18) Figure 45. DC/DC Loop Compensation Copyright © 2013–2014, Texas Instruments Incorporated Submit Documentation Feedback 29 Product Folder Links: TPS65279V |
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