LM75B datasheet(7/31 Pages) TI

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LM75B, LM75C

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SNIS153D – JULY 2009 – REVISED OCTOBER 2015

6.7 I

2C Digital Switching Characteristics

Unless otherwise noted, these specifications apply for VS = 5 Vdc for LM75BIM-5, LM75BIMM-5, LM75CIM-5, and

LM75CIMM-5; and +VS = 3.3 Vdc for LM75BIM-3, LM75BIMM-3, LM75CIM-3, and LM75CIMM-3, CL (load capacitance) on

output lines = 80 pF unless otherwise specified. TA = TJ = 25°C, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN(1)(2) TYP(3)

MAX(1)(2)

UNIT

SCL (Clock) Period, See Figure 1

–55°C

≤ TA ≤ 125°C

2.5

µs

Data in Set-Up Time to SCL High, See Figure 1

–55°C

≤ TA ≤ 125°C

100

Data Out Stable after SCL Low, See Figure 1

–55°C

≤ TA ≤ 125°C

SDA Low Set-Up Time to SCL Low (Start Condition),

–55°C

≤ TA ≤ 125°C

100

See Figure 1

SDA High Hold Time after SCL High (Stop Condition),

–55°C

≤ TA ≤ 125°C

100

See Figure 1

LM75B

–55°C

≤ TA ≤ 125°C

325

tTIMEOUT

SDA Time Low for Reset of Serial Interface(4)

Not

LM75C

Applicable

(1)

Limits are specified to AOQL (Average Outgoing Quality Level).

(2)

Timing specifications are tested at the bus input logic levels (Vin(0)=0.3xVA for a falling edge and Vin(1)=0.7xVA for a rising edge) when

the SCL and SDA edge rates are similar.

(3)

Typicals are at TA = 25°C and represent most likely parametric norm.

(4)

Holding the SDA line low for a time greater than tTIMEOUT will cause the LM75B to reset SDA to the IDLE state of the serial bus

communication (SDA set High).

Figure 1. Timing Diagram

Figure 2. Temperature-to-Digital Transfer Function (Non-Linear Scale for Clarity)

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