AS3630 datasheet(41/72 Pages) AMSCO

41 / 72 page

8A Supercap Flash Driver

AS3630 – 41

Figure AS3630 – 37:

Data Transfer on I²C Serial Bus

Depending upon the state of the R/W bit, two types of data

transfer are possible:

Data transfer from a master transmitter to a slave

receiver. The first byte transmitted by the master is the

slave address. Next follows a number of data bytes. The

slave returns an acknowledge bit after each received

byte. Data is transferred with the most significant bit

(MSB) first.

Data transfer from a slave transmitter to a master

receiver. The master transmits the first byte (the slave

address). The slave then returns an acknowledge bit,

followed by the slave transmitting a number of data

bytes. The master returns an acknowledge bit after all

received bytes other than the last byte. At the end of the

last received byte, a “not acknowledge” is returned. The

master device generates all of the serial clock pulses and

the START and STOP conditions. A transfer is ended with

a STOP condition or with a repeated START condition.

Since a repeated START condition is also the beginning

of the next serial transfer, the bus is not released. Data

is transferred with the most significant bit (MSB) first.

The AS3630 can operate in the following two modes:

Slave Receiver Mode (Write Mode): Serial data and

clock are received through SDA and SCLK. After each

byte is received an acknowledge bit is transmitted.

START and STOP conditions are recognized as the

beginning and end of a serial transfer. Address

recognition is performed by hardware after reception of

the slave address and direction bit (see Figure 38). The

slave address byte is the first byte received after the

master generates the START condition. The slave

address byte contains the 7-bit AS3630 address, which

is shown in Figure 42, followed by the direction bit

(R/W), which, for a write, is 0.11 After receiving and

decoding the slave address byte the device outputs an

acknowledge on the SDA line. After the AS3630

7 bit SLAVE

ADDRESS

ACKNOWLEDGE-

MENT SIGNAL FROM

RECEIVER

ACKNOWLEDGE-

MENT SIGNAL FROM

RECEIVER

REPEATED IF

MORE BYTES

ARE TRANS-

STOP CONDITION

OR REPEATED

START CONDI-

START

CONDITION

SCLK

SDA

MSB

R/W

DIREC-

TION

ACK

3-7

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