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AD5672R/AD5676R

Data Sheet

Rev. B | Page 24 of 34

THEORY OF OPERATION

DIGITAL-TO-ANALOG CONVERTER

The AD5672R/AD5676R are octal, 12-/16-bit, serial input,

voltage output DACs with an internal reference. The devices

operate from supply voltages of 2.7 V to 5.5 V. Data is written to

the AD5672R/AD5676R in a 24-bit word format via a 3-wire

serial interface. The AD5672R/AD5676R incorporate a power-

on reset circuit to ensure that the DAC output powers up to a

known output state. The devices also have a software power-

down mode that reduces the typical current consumption to 1 µA.

TRANSFER FUNCTION

The internal reference is on by default.

The gain of the output amplifier can be set to ×1 or ×2 using the

gain select pin (GAIN) on the TSSOP or the gain bit on the LFCSP.

When the GAIN pin is tied to GND, all eight DAC outputs have

a span from 0 V to VREF. When the GAIN pin is tied to VLOGIC,

all eight DACs output a span of 0 V to 2 × VREF. When using the

LFCSP, the gain bit in the internal reference and gain setup

bit is 0 by default. When the gain bit is 0, the output span of all

eight DACs is 0 V to VREF. When the gain bit is 1, the output span

of all eight DACs is 0 V to 2 × VREF. The gain bit is ignored on

the TSSOP.

DAC ARCHITECTURE

The AD5672R/AD5676R implement a segmented string DAC

architecture with an internal output buffer. Figure 58 shows the

internal block diagram.

INPUT

2.5V

REF

DAC

RESISTOR

STRING

REF (+)

REF (–)

VREF

VOUTX

GND

GAIN

(GAIN = 1 OR 2)

Figure 58. Single DAC Channel Architecture Block Diagram

Figure 59 shows the resistor string structure. The code loaded to

the DAC register determines the node on the string where the

voltage is tapped off and fed into the output amplifier. The voltage

is tapped off by closing one of the switches and connecting the

string to the amplifier. Because each resistance in the string has

same value, R, the string DAC is guaranteed monotonic.

TO OUTPUT

AMPLIFIER

VREF

Figure 59. Resistor String Structure

Internal Reference

The AD5672R/AD5676R on-chip reference is enabled at power-

up, but can be disabled via a write to the control register. See the

Internal Reference Setup section for details.

The AD5672R/AD5676R have a 2.5 V, 2 ppm/°C reference, giving

a full-scale output of 2.5 V or 5 V, depending on the state of the

GAIN pin or gain bit. The internal reference associated with the

device is available at the VREFOUT pin. This buffered reference is

capable of driving external loads of up to 15 mA.

Output Amplifiers

The output buffer amplifier generates rail-to-rail voltages on its

output. The actual range depends on the value of VREF, the gain

setting, the offset error, and the gain error.

The output amplifiers can drive a load of 1 kΩ in parallel with

10 nF to GND. The slew rate is 0.8 V/µs with a typical ¼ to ¾

scale settling time of 5 µs.

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