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DLPA2000 Datasheet(PDF) 29 Page - Texas Instruments |
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DLPA2000 Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 58 page  DLPA2000 www.ti.com DLPS043A – JUNE 2014 – REVISED AUGUST 2015 7.5 Register Maps Table 8. Register Description ADDRESS DEFAULT REGISTER NAME TABLE DESCRIPTION (HEX) USER CONFIGURATION DEFINITIONS R 0x00 CHIP ID Figure 15 Chip Revision Register; DLPA2000 B3 R/W 0x01 CHIPENABLE Figure 16 Enable Register 0F R/W 0x02 IREG Figure 17 Transient-current limit settings 30 R/W 0x03 SW4MSB Figure 18 Regulation current MSB, SW4 0 R/W 0x04 SW4LSB Table 13, Table 14 Regulation current LSB, SW4 0 R/W 0x05 SW5MSB Figure 20 Regulation current MSB, SW5 0 R/W 0x06 SW5LSB Figure 21, Table 17 Regulation current LSB, SW5 0 R/W 0x07 SW6MSB Figure 22 Regulation current MSB, SW6 0 R/W 0x08 SW6LSB Figure 23, Table 20 Regulation current LSB, SW6 0 R/W 0x09 SWCNTRL Figure 24 Switch ON/OFF control (direct mode) 0 R/W 0x0A AFE Figure 25 AFE (MUX) control 0 R/W 0x0B BBM Figure 26, Table 23 Break Before Make timing 0 R 0x0C INT Figure 27, Table 24 Interrupt register 0 R/W 0x0D INT MASK Figure 28, Table 25 Interrupt Mask register DFh Timing register VOFS, VBIAS, VRST, R/W 0x0E TIMING Figure 29, Table 27 7 and RESETZ R/W 0x0F MOTOR CTRL Figure 30, Table 28 Motor Control register 0 USER PROTECTED DEFINITION R/W 0x10 PASSWORD Figure 31 Password register 0 R/W 0x11 SYSTEM Figure 32 System Configuration register 0 USER EEPROM SCRATCH PAD DEFINITION R/W 0x20 BYTE0 Figure 33 User EEPROM, Byte0 0 R/W 0x21 BYTE1 Figure 34 User EEPROM, Byte1 0 R/W 0x22 BYTE2 Figure 35 User EEPROM, Byte2 0 R/W 0x23 BYTE3 Figure 36 User EEPROM, Byte3 0 R/W 0x24 BYTE4 Figure 37 User EEPROM, Byte4 0 R/W 0x25 BYTE5 Figure 38 User EEPROM, Byte5 0 R/W 0x26 BYTE6 Figure 39 User EEPROM, Byte6 0 R/W 0x27 BYTE7 Figure 40 User EEPROM, Byte7 0 7.5.1 Chip Revision Register Figure 15. Chip Revision Register, Address = 00h, HEX = B3 7 6 5 4 3 2 1 0 CHIP ID [7:0] R R R R R R R R LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 9. Chip Revision Register Field Descriptions BIT FIELD TYPE RESET DESCRIPTION 7:4 R 1011 CHIPID<3:0> CHIP ID 3:0 R 0011 REVID<3:0> Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 29 Product Folder Links: DLPA2000 |
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