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LAN8810 Datasheet(PDF) 24 Page - Microchip Technology |
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LAN8810 Datasheet(HTML) 24 Page - Microchip Technology |
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24 / 83 page ![]() LAN8810/LAN8810I DS00001870B-page 24 2009-2015 Microchip Technology Inc. 3.8.1.2.1 Configuring the SMI Address (CONFIG[1:0]) The SMI address may be configured via hardware to any value between 0 and 7. If an address greater than 7 is required, the user can configure the PHY address using Software Configuration via the PHYADD[4:0] field of the 10/100 Special Modes Register (after SMI communication at an address is established). The CONFIG1 pin is used to configure both the SMI address and the value of the Pause Operation (PAUSE) bit in the Auto Negotiation Advertisement Register. The user must first determine the desired PAUSE value. The configuration pin values for CONFIG1 and CONFIG0 should then be selected using Table 3-6 (PAUSE=0) or Table 3-7 (PAUSE=1), respectively. 3.8.1.2.2 Configuring the Mode of Operation (CONFIG[3:2]) This section describes the initial modes of operation that are available using the CONFIG[3:2] configuration pins. The user may configure additional modes using Software Configuration when the CONFIG[3:2] options do not include the desired mode. The CONFIG3 pin is used to configure the values of the MOD field (19.15:11) The configuration pin values for CONFIG3 and CONFIG2 should be selected using Table 3-8. These tables also detail how the MOD field of the Extended Mode Control/Status Register will be configured. TABLE 3-7: SMI ADDRESS CONFIGURATION WITH PAUSE=0 PHYADD[2:0] CONFIG1 CONFIG0 000 CPV(0) CPV(0) 001 CPV(0) CPV(1) 010 CPV(0) CPV(2) 011 CPV(0) CPV(3) 100 CPV(1) CPV(0) 101 CPV(1) CPV(1) 110 CPV(1) CPV(2) 111 CPV(1) CPV(3) TABLE 3-8: SMI ADDRESS CONFIGURATION WITH PAUSE=1 PHYADD[2:0] CONFIG1 CONFIG0 000 CPV(2) CPV(0) 001 CPV(2) CPV(1) 010 CPV(2) CPV(2) 011 CPV(2) CPV(3) 100 CPV(3) CPV(0) 101 CPV(3) CPV(1) 110 CPV(3) CPV(2) 111 CPV(3) CPV(3) |
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