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LAN8810 Datasheet(PDF) 58 Page - Microchip Technology |
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LAN8810 Datasheet(HTML) 58 Page - Microchip Technology |
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58 / 83 page ![]() LAN8810/LAN8810I DS00001870B-page 57 2009-2015 Microchip Technology Inc. 4.3.10 RECEIVE ERROR DURING DATA COUNTER REGISTER 4.3.11 RECEIVE ERROR DURING IDLE COUNTER REGISTER 4.3.12 TRANSMIT PACKET COUNTER HIGH REGISTER 4.3.13 TRANSMIT PACKET COUNTER MID REGISTER Index: U8 Size: 16 bits Bits Description Type Default 15:0 RXERIND_DATA[15:0] Counts the assertions of RXER (going from low to high) when RXDV is high. RO/ RC 0000h Index: U9 Size: 16 bits Bits Description Type Default 15:0 RXERIND_IDLE[15:0] Counts the assertions of RXER (going from low to high) when RXDV is low. RO/ RC 0000h Index: U10 Size: 16 bits Bits Description Type Default 15:0 TXPKT[47:32] Counts the number of transmitted packets. Contains the 16 upper bits of the 48-bit counter. Reading this register resets all bits in the Transmit Packet Counter. RO/ RC 0000h Note: The 48-bit transmit packet counter is split across 3 registers. In order to read the counter correctly, the reg- isters must be read in the following order: Transmit Packet Counter Low Register, Transmit Packet Counter Mid Register, Transmit Packet Counter High Register. After reading the high register, the counter will be automatically cleared. Index: U11 Size: 16 bits |
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