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LAN8810 Datasheet(PDF) 71 Page - Microchip Technology |
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LAN8810 Datasheet(HTML) 71 Page - Microchip Technology |
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71 / 83 page  LAN8810/LAN8810I DS00001870B-page 71 2009-2015 Microchip Technology Inc. Note 5-3 40ns for 100BASE-TX operation, 400ns for 10BASE-T operation. Note 5-4 Timing was designed for system load between 10 pf and 25 pf. FIGURE 5-7: MII RECEIVE TIMING TABLE 5-16: MII RECEIVE TIMING VALUES Symbol Description Min Max Units Notes tclkp RXCLK period Note 5-3 ns tclkh RXCLK high time tclkp*0.4 tclkp*0.6 ns tclkl RXCLK low time tclkp*0.4 tclkp*0.6 ns tval RXD[3:0], RXDV output valid from rising edge of RXCLK 28.0 ns Note 5-4 thold RXD[3:0], RXDV output hold from rising edge of RXCLK 10.0 ns Note 5-4 RXCLK RXD[3:0] RXDV tclkh tclkl tclkp tval thold tval tval thold |
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