LAN8810 datasheet(68/83 Pages) MICROCHIP

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DS00001870B-page 68

LAN8810/LAN8810I

5.5.4

RESET TIMING

Figure 5-4 illustrates the nRESET pin timing requirements. For proper operation, nRESET must be asserted for no less

than trstia. In order for valid configuration strap values to be read upon a nRESET assertion, the tcss and tcsh timing con-

straints must be followed. In order for CONFIG[3:0] values to be read at power-up, the tcs and tch timing constraints must

be followed. Refer to Section 3.6.1, "Hardware Reset (nRESET)," on page 22 for additional information.

5.5.5

GMII TIMING (1000BASE-T)

This section specifies the GMII interface transmit and receive timing. Please refer to Section 3.3, "GMII Interface," on

page 18 for additional details.

Note:

A hardware reset (nRESET assertion) is required following power-up. Refer to Section 5.5.3, "Power-On

Hardware Reset Timing," on page 67 for additional information.

FIGURE 5-4:

RESET TIMING

TABLE 5-13:

RESET TIMING VALUES

Symbol

Description

Min

Typ

Max

Units

trstia

nRESET input assertion time

S

tcss

Configuration strap pins setup to nRESET deassertion

200

tcsh

Configuration strap pins hold after nRESET deassertion

totaa

Output tri-state after nRESET assertion

todad

Output drive after deassertion

800

tcs

CONFIG[3:0] setup to nRESET deassertion

tch

CONFIG[3:0] hold after nRESET deassertion

Note:

Device configuration straps are latched as a result of nRESET assertion. Refer to Section 3.8.1.1, "Con-

figuration Straps," on page 24 details. Configuration straps must only be pulled high or low and must not

be driven as inputs.

tcss

nRESET

Configuration

Straps

tcsh

Configuration Strap

Pins Output Drive

tcs

CONFIG[3:0]

tch

trstia

todad

totaa

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