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LAN8810 Datasheet(PDF) 78 Page - Microchip Technology

Part # LAN8810
Description  GMII 10/100/1000 Ethernet Transceiver
PDF  83 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN8810 Datasheet(HTML) 78 Page - Microchip Technology

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 2009-2015 Microchip Technology Inc.
DS00001870B-page 78
LAN8810/LAN8810I
APPENDIX A:
DATA SHEET REVISION HISTORY
TABLE 6-2:
REVISION HISTORY
Revision Level & Date
Section/Figure/Entry
Correction
DS00001870B
(10-27-15)
Table 3-9, "Configuring the
Mode of Operation"
• Table 3-9 - In row 6, removed “CRS is active
during Transmit & Receive”.
• Trademark and Sales office listings updated.
All: (Cover, Figure 2-1,
Table 2-3, Table 2-6,
Table 2-8, Table 3-4,
Section 4.3.2, Section 5.6)
Removed references to 125MHz single-ended
clock support and the REF_SEL configuration
strap.
Table 2-3
Updated CONFIG3 pin description to correct list of
connection pins.
Table 3-10
Updated mode definition Reg 19[15:11] “00100”
entry.
Section 4.2.10
Updated bit 11 description (active only when
Manual Config. Enable is 1).
Section 4.2.16
• Added note to MOD bits: “The MOD bits
should not be modified and must be preserved
when writing to this register.”
• Updated bits 8:6 description to indicate they
must be written with specific values.
Table 3-9
Corrected typos in mode definitions of rows 3 and
4.
Table 3-10
Corrected typos in row 5 (00100) mode definitions,
Reg 0, and Reg 4 columns.
Section 5.6
Updated second sentence to “If the single-ended
clock oscillator method is implemented, XO should
be left unconnected and XI should be driven with a
nominal 0V-VDDVARIO clock signal.”
DS00001870A (12-09-14)
Section 3.6.1, "Hardware
Reset (nRESET)," on
page 22
Updated section with additional details on power-
up sequencing requirements.
Section 5.5.3, "Power-On
Hardware Reset Timing," on
page 67
Updated section with additional details on power-
up sequencing requirements. Section title and
included figures/tables updated.
Rev. 1.1 (06-03-13)
Section 4.2.4, "PHY
Identifier 2 Register," on
page 38
Corrected bits 9:4 default values from 0Ch to 0Eh
Table 3-11, “LED Mode 1
Operation -
LED_MODE[1:0]=01b,” on
page 27 and Table 3-12,
“LED Mode 2 Operation -
LED_MODE[1:0]=10b,” on
page 27
Updated LED function definitions



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