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LAN8810 Datasheet(PDF) 69 Page - Microchip Technology |
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LAN8810 Datasheet(HTML) 69 Page - Microchip Technology |
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69 / 83 page ![]() LAN8810/LAN8810I DS00001870B-page 69 2009-2015 Microchip Technology Inc. Note 5-1 Min/max limits are non-sustainable long term. Note 5-2 tr and tf are measured from VIL_AC(Max)=0.7V to VIH_AC(Min)=1.9V. Note: All GMII timing specifications assume a point-to-point test circuit as defined in Section 35.4.2.2 of the IEEE 802.3-2005 specification. FIGURE 5-5: GMII TRANSMIT TIMING TABLE 5-14: GMII TRANSMIT TIMING VALUES Symbol Description Min Max Units Notes fgtxclk GTXCLK Frequency 125 - 100ppm 125 + 100ppm MHz tclkp GTXCLK period 7.5 8.5 ns Note 5-1 tclkh GTXCLK high time 2.5 ns tclkl GTXCLK low time 2.5 ns tval TXD[7:0], TXEN, TXER setup time to rising edge of GTXCLK 2.0 ns thold TXD[7:0], TXEN, TXER hold time after rising edge of GTXCLK 0.0 ns tr GTXCLK rise time 1 ns Note 5-2 tf GTXCLK fall time 1 ns Note 5-2 GTXCLK TXD[7:0], TXEN, TXER tclkh tclkl tclkp thold tval tr tf |
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