TUSB3210PM datasheet(33/50 Pages) TI1

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TUSB3210

www.ti.com

SLLS466G – FEBRUARY 2001 – REVISED DECEMBER 2015

7.5.10 I2C Registers

The TUSB3210 device only supports a master-slave relationship; therefore, it does not support bus arbitration.

7.5.10.1 I2CSTA: I 2C Status and Control Register

This register is used to control the stop condition for read and write operations. In addition, it provides transmitter

and receiver handshake signals with their respective interrupt enable bits.

RXF

RIE

ERR

1/4

TXE

TIE

SRD

SWR

R/C

R/W

R/C

R/W

R/C

R/W

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

BIT

NAME

RESET

FUNCTION

Stop write condition. This bit defines whether the I2C controller generates a stop condition when data from

the I2CDAO register is transmitted to an external device.

Stop condition is not generated when data from the I2CDAO register is shifted out to an

SWR

SWR = 0

external device.

Stop condition is generated when data from the I2CDAO register is shifted out to an external

SWR = 1

device.

Stop read condition. This bit defines whether the I2C controller generates a stop condition when data is

received and loaded into I2CDAI register.

SRD

SRD = 0

Stop condition is not generated when data from SDA line is shifted into the I2CDAI register.

SRD = 1

Stop condition is generated when data from SDA line is shifted into the I2CDAI register.

I2C transmitter empty interrupt enable

TIE

TIE = 0

Interrupt disabled

TIE = 1

Interrupt enabled

I2C transmitter empty. This bit indicates that data can be written to the transmitter. It can be used for

polling or it can generate an interrupt.

TXE

TXE = 0

Transmitter is full. This bit is cleared when the MCU writes a byte to the I2CDAO register.

Transmitter is empty. The I2C controller sets this bit when the content of the I2CDAO register is

TXE = 1

copied to the SDA shift register.

Bus speed selection

1/4

1/4 = 0

100-kHz bus speed

1/4 = 1

400-kHz bus speed

Bus error condition. This bit is set by the hardware when the device does not respond. It is cleared by the

MCU.

ERR

ERR = 0

No bus error

Bus error condition has been detected. Clears when the MCU writes a 1. Writing a 0 has no

ERR = 1

effect.

I2C receiver ready interrupt enable

RIE

RIE = 0

Interrupt disabled

RIE = 1

Interrupt enabled

I2C receiver full. This bit indicates that the receiver contains new data. It can be used for polling or it can

generate an interrupt.

RXF

RXF = 0

Receiver is empty. This bit is cleared when the MCU reads the I2CDAI register.

Receiver contains new data. This bit is set by the I2C controller when the received serial data

RXF = 1

has been loaded into the I2CDAI register.

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