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L9662 Datasheet(PDF) 34 Page - STMicroelectronics |
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L9662 Datasheet(HTML) 34 Page - STMicroelectronics |
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34 / 80 page ![]() Functional description L9662 34/80 DocID028325 Rev 1 functions, and results, will be available through the serial interface. This pin must be pulled high to initiate the FEN latch function (if programmed) and enable firing of the FET drivers. The FEN function will be considered active when the pin is active (‘1’ or high) for more than 12 microseconds. Tolerance range for the filter to be used will be 12 to 16 μs. When the FENx input is active, ‘1’, the FEN function will be active. When the FENx input state transitions from ‘1’ to ‘0’, the programmable latching function will hold the FEN function active until the timeout of the FEN timer. The programmable latch and hold function will be capable of delays of 0ms, 128ms, 256ms, and 512ms. There are 4 independent timers with the timer for FEN1 associated with channels 1 & 2, timer for FEN2 associated with channels 3 & 4, timer for FEN3 associated with channels 5 & 6, and the timer for FEN4 associated with channels 7 & 8. The timer is reset to the programmed time when the FENx pin transitions from ‘0’ to ‘1’. The programmable counter delay will be set through a SPI command. 3.4.4 Squib diagnostics Overview The ASIC is able to perform the following diagnostics Short to battery and ground on both SQHx and SQLx pins with or without a squib Loop to loop diagnostics Squib resistance measurement Squib High resistance High Side Safing FET diagnostics VRESx voltage status High and Low side FET diagnostics Below is a block diagram showing the components involved in the squib diagnostics. |
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