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S7600A Datasheet(PDF) 40 Page - Seiko Instruments Inc |
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S7600A Datasheet(HTML) 40 Page - Seiko Instruments Inc |
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40 / 60 page ![]() TCP/IP Network Stack LSI S-7600A Hardware Specification Revision 1.3 7-13 Seiko Instruments Inc. 7.3.15. Socket Status Mid Register (0x23) (Read-Only, Default 0x00) This read-only register reports other socket status conditions. Table 7-25 Socket Status Mid Register Bit Definitions Bit 7 6 5 4 3 2 1 0 Def. URG RST Term ConU TCP State Default 0 0 0 0 0x0 Table 7-26 Socket Status Mid Register Description Bit Bit Name Access Description 7 URG R This bit indicates the arrival of urgent data. Writing a “1” to the URG bit in the Socket Interrupt register (bit 7) clears this bit. 0 = No urgent data present 1 = Urgent data present 6 RST R This bit indicates when the socket receives the RST signal from the TCP peer. 0 = No RST received 1 = RST received 5 Term R This bit indicates when the socket terminates from the source and triggers an interrupt if the Term_En bit is set in the Socket Interrupt Mask High register (0x2B). The interrupt mask setting does not effect the reporting of this status bit. 0 = Normal Operating Condition 1 = Socket terminated from source This bit becomes “1” when the S-7600A receives a TCP segment with the FIN flag on. This means that the remote peer has requested to close the TCP connection. 4 ConU R This bit indicates when the socket establishes a connection to a host machine. The bit clears when the connection terminates (by either end). 0 = No Connection Established 1 = Connection Established 3:0 TCP State R These bits indicate the current TCP state. 0 = CLOSED 1 = SYN_SENT 2 = ESTABLISHED 3 = CLOSE_WAIT 4 = LAST_ACK 5 = FIN_WAIT1 6 = FIN_WAIT2 7 = CLOSING 8 = TIME_WAIT 9 = LISTEN a = SYN_RECVD |
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