Electronic Components Datasheet Search
  English  ▼

X  

S7600A Datasheet(PDF) 41 Page - Seiko Instruments Inc

Part # S7600A
Description  Hardware Specification (TCP/IP Network Stack LSI)
PDF  60 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  SII [Seiko Instruments Inc]
Direct Link  http://www.sii.co.jp
Logo SII - Seiko Instruments Inc

S7600A Datasheet(HTML) 41 Page - Seiko Instruments Inc

Back Button S7600A Datasheet HTML 37Page - Seiko Instruments Inc S7600A Datasheet HTML 38Page - Seiko Instruments Inc S7600A Datasheet HTML 39Page - Seiko Instruments Inc S7600A Datasheet HTML 40Page - Seiko Instruments Inc S7600A Datasheet HTML 41Page - Seiko Instruments Inc S7600A Datasheet HTML 42Page - Seiko Instruments Inc S7600A Datasheet HTML 43Page - Seiko Instruments Inc S7600A Datasheet HTML 44Page - Seiko Instruments Inc S7600A Datasheet HTML 45Page - Seiko Instruments Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 41 / 60 page
background image
TCP/IP Network Stack LSI
S-7600A
Hardware Specification Revision 1.3
Seiko Instruments Inc.
7-14
7.3.16. Socket Activate Register (0x24)
(Read/Write, Default 0x00)
This register is used to activate the sockets and also show the current status of each socket. Setting a bit
to “1” activates the corresponding socket. This register defaults to 0x00 upon resets.
Table 7-27
Socket Activate Register Bit Definitions
Bit
7
6
5
4
3
2
1
0
Def.
-
-
-
-
-
-
S1
S0
Default
0
0
0
0
0
0
0
0
Table 7-28
Socket Activate Register Description
Bit
Bit Name
Access
Description
1
S1
R/W
This bit is used to activate general socket 1.
0 = General socket 1 inactive
1 = General socket 1 active
0
S0
R/W
This bit is used to activate general socket 0.
0 = General socket 0 inactive
1 = General socket 0 active
7.3.17. Socket Interrupt Register (0x26)
(Read-Only, Default 0x00)
This register indicates which socket has interrupts pending. When identification of an interrupting socket
occurs, the actual source of the interrupt is determined by examining the specific socket’s interrupt
register.
Table 7-29
Socket Interrupt Register Bit Definitions
Bit
7
6
5
4
3
2
1
0
Def.
-
-
-
-
-
-
I1
I0
Default
0
0
0
0
0
0
0
0



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com