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TTP255 Datasheet(PDF) 18 Page - Tontek Design Technology |
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TTP255 Datasheet(HTML) 18 Page - Tontek Design Technology |
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18 / 49 page ![]() Preliminary TTP255 TonTouch TM 12’/08/21 Page 18 of 49 Ver3.0 .External Reset (RSTB) This is one kind of system resetting signal, but only forced externally. When the chip acknowledged the low level from the pin RSTB exceed 1 us, it will generate the reset procedure to reset CPU & all the peripheral back to their initial state (default values). .Burn out Reset (Program sequence abnormal) As CPU out of program area, the CPU can detect the abnormal condition and generate a system reset request. .Watch Dog Timer Reset The reset signal will generate automatically when the watchdog timer runs overflow. If the watchdog timer is cleared regularly by users’ program, no watchdog reset will occur. Unless the MCU is forced into abnormal state, the software controlled procedure is disrupted and causing watch dog timer overflow, then it will generate reset signal to initializes the chip returning to normal operation. .Low Voltage Reset (LVR) The LVR function is used to monitor the supply voltage of MCU, it will generate a reset signal (with 4*OSCL de-bounce time but no de-bounce in stop mode) to reset the microcontroller as the VDD power falls below the default setting level VLVR. It can also be enabled or disabled by programming “LVREN” bit in PS register. RESETF: reset source flag register[R/W], power on value [0000] Register Bit3 Bit2 Bit1 Bit0 Bit Name ROMF BOF LVRF WDTF Read/Write RW R/W R/W R/W WDTF: Watch dog timer overflow reset flag (0: no active; 1: active) LVRF: Low voltage reset flag (0: no active; 1: active) BOF: Burn out flag(0: no active; 1: active) ROMF: ROM fail flag(0: no active; 1: active) (The RESETF is cleared by system reset only) |
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