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DP83950B Datasheet(PDF) 40 Page - National Semiconductor (TI) |
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DP83950B Datasheet(HTML) 40 Page - National Semiconductor (TI) |
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40 / 80 page ![]() 50 Functional Description (Continued) Table 53 Status Display Pin Functions in MAXIMUM MODE Signal Pin Function in Maximum Mode Name D0 Provides status information concerning the Link Integrity status of 10BASE-T segments This signal should be connected to the data inputs of the chosen pair of 74LS259 latches D1 Provides status information indicating if there is a collision occurring on one of the segments attached to this RIC This signal should be connected to the data inputs of the chosen pair of 74LS259 latches D2 Provides status information indicating if one of this RIC’s ports is receiving a data or a collision packet from its segment This signal should be connected to the data inputs of the chosen pair of 74LS259 latches D3 Provides Status information indicating that the RIC has experienced a jabber protect condition Additionally it denotes which of its ports are partitioned This signal should be connected to the data inputs of the chosen pair of 74LS259 latches D4 Provides status information indicating if one of this RIC’s ports is receiving data of inverse polarity This status output is only valid if the port is configured to use its internal 10BASE-T transceiver The signal should be connected to the data inputs of the chosen pair of 74LS259 latches D(75) These signals provide the repeater port address corresponding to the data available on D(40) STR0 This signal is the latch enable for the lower byte latches that is the 74LS259s which display information concerning ports 1 to 7 STR1 This signal is the latch enable for the upper byte latches that is the 74LS259s which display information concerning ports 8 to 13 Maximum Mode LED Definitions 74LS259 Latch Inputs e STR0 259 Output Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 259 Addr S2 – 0 000 001 010 011 100 101 110 111 RIC Port Number 1 (AUI) 2 3 4 5 6 7 RIC D0 259 1 LINK LINK LINK LINK LINK LINK RIC D1 259 2 ACOL COL COL COL COL COL COL COL RIC D2 259 3 AREC REC REC REC REC REC REC REC RIC D3 259 4 JAB PART PART PART PART PART PART PART RIC D4 259 5 BDPOL BDPOL BDPOL BDPOL BDPOL BDPOL 74LS259 (or Equiv) Latch Inputs e STR1 259 Output Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 259 Addr S2 – 0 000 001 010 011 100 101 110 111 RIC Port Number 8 9 10 11 12 13 RIC D0 259 6 LINK LINK LINK LINK LINK LINK RIC D1 259 7 COL COL COL COL COL COL RIC D2 259 8 REC REC REC REC REC REC RIC D3 259 9 PART PART PART PART PART PART RIC D4 259 10 BDPOL BDPOL BDPOL BDPOL BDPOL BDPOL This shows the LED Output Functions for the LED Drivers when 74LS259s are used The top table refers to the bank of 4 74LS259s latched with STR0 and the lower table refers to the bank of 4 74LS259s latched with STR1 For example the RIC’s D0 data signal goes to 259 1 and 5 These two 74LS259s then drive the LINK LEDs) Note ACOL e Any Port Collision AREC e Any Port Reception JAB e Any Port Jabbering LINK e Port Link COL e Port Collision REC e Port Reception PART e Port Partitioned BDPOL e Bad (inverse) Polarity or received data FIGURE 512 40 |
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