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DP83950B Datasheet(PDF) 75 Page - National Semiconductor (TI) |
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DP83950B Datasheet(HTML) 75 Page - National Semiconductor (TI) |
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75 / 80 page ![]() 90 AC and DC Specifications (Continued) MANAGEMENT BUS TIMING TLF11096 – 30 Number Symbol Parameter Min Max Units T50 mrxch MRXC High Time 45 55 ns T51 mrxcl MRXC Low Time 45 55 ns T52 mrxcd MRXC Cycle Time 90 110 ns T53 actndamena ACTNd Active to MEN Active 715 ns T54 actndamcrsa ACTNd Active to MCRS Active 720 ns T55 mrxds MRXD Setup 40 ns T56 mrxdh MRXD Hold 45 ns T57 mrxclmcrsi MRXC Low to MCRS Inactive b 56 ns T58 mcrsimenl MCRS Inactive to MEN Low 510 ns T59 mrxcclks Min Number of MRXCs after MCRS Inactive 5 5 Clks T60 pcompw PCOMP Pulse Width 20 ns Note The preamble on this bus consists of the following string 01011 Note In these diagrams the Inter-RIC and Management Busses are shown using active high signals active low signals may also be used See Section 55 Mode Load Operation 75 |
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