TUSB5052 datasheet(45/82 Pages) TI

Part #	TUSB5052

Description	USB TO 2-SERIAL PORT CONTROLLER WITH CONFIGURABLE OPTIONAL HUB

PDF	82 Pages

Scroll/Zoom	100%

Manufacturer	TI [Texas Instruments]

Direct Link	http://www.ti.com

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45 / 82 page

6−3

6.1.2

DMACSR[2:1]: DMA Control and Status Register (2 UART Transmit Channels)

This register is used to define the transaction time-out value. In addition, it contains a completion code that reports

any errors or a time-out condition. Note that the XY bit sets XYO/XYI in the DMACDR5 register.

RSV

PPKT

R/O

R/W

R/O

R/C

BIT

NAME

RESET

FUNCTION

PPKT

Partial packet condition bit. This bit is set by the DMA and cleared by the MCU (see Table 6−2).

PPKT = 0

No partial-packet condition

PPKT = 1

Partial-packet condition detected. When IEN = 0, this bit does not clear the EN bit in DMACDR;

therefore, the DMAC stays enabled, ready for the next transaction. Clears when MCU writes a 1.

Writing a 0 has no effect.

7−1

RSV

Reserved = 0

Table 6−2. DMA OUT-Termination Condition

OUT-TERMINATION

TXFT

PPKT

COMMENTS

UART partial packet

This condition occurs when the host sends a partial packet.

TUSB5052 Datasheet(PDF) 45 Page - Texas Instruments