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TUSB5052 Datasheet(PDF) 27 Page - Texas Instruments |
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TUSB5052 Datasheet(HTML) 27 Page - Texas Instruments |
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27 / 82 page ![]() 4−7 Table 4−5. EDB Entries in RAM (n = 1 to 7) OFFSET ENTRY NAME DESCRIPTION 07 EPSIZXY_n I/O endpoint_n: X/Y-buffer size 06 EPBCTY_n I/O endpoint_n: Y-byte count 05 EPBBAY_n I/O endpoint_n: Y-buffer base address 04 SPARE Not used 03 SPARE Not used 02 EPBCTX_n I/O endpoint_n: X-byte count 01 EPBBAX_n I/O endpoint_n: X-buffer base address 00 EPCNF_n I/O endpoint_n: Configuration 4.3.1 OEPCNF_n: Output Endpoint Configuration (n = 1 to 7) UBME ISO TOGLE DBUF STALL USBIE RSV RSV 7 6 5 4 32 10 R/W R/W R/W R/W R/W R/W R/O R/O BIT NAME RESET FUNCTION 1−0 RSV x Reserved = 0 2 USBIE x USB interrupt enable on transaction completion. Set/cleared by the MCU USBIE = 0 No interrupt USBIE = 1 Interrupt on transaction completion 3 STALL 0 USB stall condition indication. Set/cleared by the MCU 3 STALL 0 STALL = 0 STALL = 1 No stall USB stall condition. If set by the MCU, a STALL handshake is initiated and the bit is cleared by the MCU. 4 DBUF x Double buffer enable. Set/cleared by the MCU. DBUF = 0 Primary buffer only (X-buffer only) DBUF = 1 Toggle bit selects buffer 5 TOGLE x USB toggle bit. This bit reflects the toggle sequence bit of DATA0, DATA1 6 ISO x ISO = 0 Non-isochronous transfer. This bit must be cleared by the MCU, because only non-isochronous transfer is supported. 7 UBME x UBM enable/disable bit. Set/cleared by the MCU UBME = 0 UBM cannot use this endpoint UBME = 1 UBM can use this endpoint 4.3.2 OEPBBAX_n: Output Endpoint X-Buffer Base-Address (n = 1 to 7) A10 A9 A8 A7 A6 A5 A4 A3 7 6 5 4 32 10 R/W R/W R/W R/W R/W R/W R/W R/W BIT NAME RESET FUNCTION 7−0 A[10:3] x A[10:3] of X-buffer base address (padded with 3-LSB of zeros for a total of 11-bits). This value is set by the MCU. The UBM or DMA uses this value as the start-address of a given transaction. Note that the UBM or DMA does not change this value at the end of a transaction. |
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