VT8231 datasheet(106/132 Pages) ETC

106 / 132 page

VT8231

Preliminary Revision 0.8 October 29, 1999

-100-

Power Management I/O-Space Registers

7HFKQRORJLHV ,QF

:H &RQQHFW

General Purpose I/O Registers

I/O Offset 44 – External SMI / GPI Input Value.............RO

Depending on the configuration, up to 8 external SCI/SMI

ports are available as indicated below.

The state of these

inputs may be read in this register.

RING# Input Value................................. (GPI7 pin)

SMBALRT# Input Value ....................... (GPI6 pin)

PME# Input Value .................................. (GPI5 pin)

SLPBTN# Input Value............................ (GPI4 pin)

General Purpose Input 17 Value ......... (GPI17 pin)

General Purpose Input 16 Value ......... (GPI16 pin)

General Purpose Input 1 Value ............. (GPI1 pin)

EXTSMI# Input Value

I/O Offset 45 – SMI / IRQ / Resume Status .....................RO

7-5

Reserved

........................................ always reads 0

Latest PCSn Status

Latest PCSn was an I/O Read

Latest PCSn was an I/O Write

FM SMI or Serial SMI Status

Hardware Monitor IRQ Status

SMBus IRQ Status

SMBus Resume Status

I/O Offset 4B-48 - GPI Port Input Value (GPIVAL)...... RO

31-24 Reserved

......................................... always read 0

23-16 GPI[23-16] by Refresh Scan .................... Read Only

15-12 Reserved

......................................... always read 0

11-0 GPI[11-0] Input Value ............................. Read Only

I/O Offset 4F-4C - GPO Port Output Value (GPOVAL)RW

Reads from this register return the last value written (held on

chip)

31-26 Reserved

........................................ always reads 0

25-0 GPO[25-0] Output Value................def = 3FFFFFFh

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