VT8231 datasheet(128/132 Pages) ETC

128 / 132 page

VT8231

Preliminary Revision 0.8 October 29, 1999

-122-

Functional Descriptions

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Power Management Events

Three types of power management events are supported:

1) ACPI-required Fixed Events defined in the PM1a_STS

and PM1a_EN registers. These events can trigger either

SCI or SMI depending on the SCI_EN bit:

• PWRBTN# Triggering

• RTC Alarm

• Sleep Button

• ACPI Power Management Timer Carry (always SCI)

• BIOS Release (always SCI)

2) ACPI-aware General Purpose Function Events defined

in the GP_STS and GP_SCI_EN, and GP_SMI_EN

registers.

These events can trigger either SCI or SMI

depending on the setting of individual SMI and SCI

enable bits:

• External SMI triggering

• USB Resume

• Ring Indicator (RI#)

• Battery Low Detect (BATLOW#)

• Notebook Lid Open/Close Detect (LID)

• Thermal Detect (THRM#)

3) Generic Global Events defined in the GBL_STS and

GBL_EN registers. These registers are mainly used for

SMI:

• PCI Bus Clock Run Resume

• Primary Interrupt Occurance

• GP0 and GP1 Timer Time Out

• Secondary Event Timer Time Out

• Occurrence of Primary Events

(defined in register PACT_STS and PACT_EN)

• Legacy USB accesses (keyboard and mouse)

- Software SMI

System and Processor Resume Events

Depending on the system suspend state, different features can

be enabled to resume the system. There are two classes of

resume events:

VCCS-based events.

Event logic resides in the

VCCS plane and thus can resume the system from

any suspend state. Such events include PWRBTN#,

RI#, BATLOW#, LID, SMBus resume event, RTC

alarm, EXTSMI#, and GP1 (EXTSMI1#).

VCC-Based Events. Event logic resides in the VCC

plane and thus can only resume the system from the

POS state. Such events include the ACPI PM timer,

USB resume, and EXTSMIn#.

PCKRUN#

PCLK

HCLK

GCLK

Host CPU

CPU Bus

CKE#

Memory Bus

SMBus

ISA

VT82C598

(Apollo MVP3)

VT82C693

(Apollo ProPlus)

FPG, EDO, or

SDRAM

(SDR or DDR)

Graphics

Controller

AGP Bus

PCISTP#

GPIO and ACPI Events

BIOS ROM

L2 Cache

(Socket-7 Only)

GCKRUN#

PCI Bus

IDE

USB

Power Plane & Peripheral Control

VT82C686A

Super South

Keyboard / Mouse

CPUSTP#

Clock

Generator

MCLK

HCLK

GCLK

PCLK

SMI# / STPCLK#

SUSCLK,

SUSST1#

SMIACT#

Module ID

Figure 7. System Block Diagram Using the VT8231 Super South Bridge

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