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MAX1021 Datasheet(PDF) 7 Page - Maxim Integrated Products |
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MAX1021 Datasheet(HTML) 7 Page - Maxim Integrated Products |
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7 / 47 page  10-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports _______________________________________________________________________________________ 7 ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = 2.7V to 3.6V (MAX1021/MAX1023/MAX1057), external reference VREF = 2.5V (MAX1021/MAX1023/MAX1057), AVDD = DVDD = 4.75V to 5.25V (MAX1020/MAX1022/MAX1058), external reference VREF = 4.096V (MAX1020/MAX1022/MAX1058), fSCLK = 4.8MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at AVDD = DVDD = 3V (MAX1021/MAX1023/MAX1057), AVDD = DVDD = 5V (MAX1020/MAX1022/MAX1058), TA = +25°C. Outputs are unloaded, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS MAX1021/MAX1023/ MAX1057 AVDD = 2.7V to 3.6V ±0.06 ±0.5 ADC Positive-Supply Rejection PSRA Full- scale input MAX1020/MAX1022/ MAX1058 AVDD = 4.75V to 5.25V ±0.06 ±0.5 mV TIMING CHARACTERISTICS (Figures 6–13) SCLK Clock Period tCP 40 ns SCLK Pulse-Width High tCH 40/60 duty cycle 16 ns SCLK Pulse-Width Low tCL 60/40 duty cycle 16 ns GPIO Output Rise/Fall After CS Rise tGOD CLOAD = 20pF 100 ns GPIO Input Setup Before CS Fall tGSU 0ns LDAC Pulse Width tLDACPWL 20 ns CLOAD = 20pF, SLOW = 0 1.8 12.0 SCLK Fall to DOUT Transition (Note 16) tDOT CLOAD = 20pF, SLOW = 1 10 40 ns CLOAD = 20pF, SLOW = 0 1.8 12.0 SCLK Rise to DOUT Transition (Notes 16, 17) tDOT CLOAD = 20pF, SLOW = 1 10 40 ns CS Fall to SCLK Fall Setup Time tCSS 10 ns SCLK Fall to CS Rise Setup TimetCSH 0ns DIN to SCLK Fall Setup Time tDS 10 ns DIN to SCLK Fall Hold Time tDH 0ns CS Pulse-Width High tCSPWH 50 ns CS Rise to DOUT Disable tDOD CLOAD = 20pF 25 ns CS Fall to DOUT Enable tDOE CLOAD = 20pF 1.5 25.0 ns EOC Fall to CS Fall tRDS 30 ns CKSEL = 01 (temp sense) or CKSEL = 10 (temp sense), internal reference on 55 CKSEL = 01 (temp sense) or CKSEL = 10 (temp sense), internal reference initially off 120 CKSEL = 01 (voltage conversion) 8 CKSEL = 10 (voltage conversion), internal reference on 8 CS or CNVST Rise to EOC Fall tDOV CKSEL = 10 (voltage conversion), internal reference initially off 80 µs CKSEL = 00, CKSEL = 01 (temp sense) 40 ns CNVST Pulse Width tCSW CKSEL = 01 (voltage conversion) 1.4 µs |
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