TUSB551

SLLSEJ1A – MARCH 2014 – REVISED MARCH 2014

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7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

Supply voltage range

–0.3

2.3

V

Differential I/O

–0.3

1.5

Voltage range at any input or output terminal

V

CMOS Inputs

–0.3

2.3

Maximum junction temperature

105

°C

(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions

is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 Handling Ratings

MIN

MAX

UNIT

Storage temperature

–65

150

°C

±4

kV

ESD

Electrostatic discharge

±1250

V

(1)

Tested in accordance with JEDEC Standard 22, Test Method A114-B.

(2)

Tested in accordance with JEDEC Standard 22, Test Method C101-A.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

Main power supply

1.62

1.8

1.98

V

Operating free-air temperature

–40

85

°C

AC coupling capacitor

75

100

200

nF

7.4 Thermal Information

TUSB551

RWB PACKAGE

UNIT

12 TERMINALS

175.2

71.5

40.5

°C/W

2.5

40.5

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter,

from the simulation data for obtaining

(6)

The junction-to-board characterization parameter,

from the simulation data for obtaining

4

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