TUSB1210 datasheet(45/66 Pages) TI1

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TUSB1210

www.ti.com

SLLSE09H – NOVEMBER 2009 – REVISED JUNE 2015

BITS

FIELD NAME

DESCRIPTION

TYPE

RESET

Reserved

MNTR_VUSBIN_OK_LATCH

Set to 1 when an unmasked event occurs on MNTR_VUSBIN_OK_LATCH.

Clear on read register.

ABNORMALSTRESS_LATCH

Set to 1 when an unmasked event occurs on ABNORMALSTRESS. Clear on

read register.

ID_FLOAT_LATCH

Set to 1 when an unmasked event occurs on ID_FLOAT. Clear on read

ID_RESC_LATCH

Set to 1 when an unmasked event occurs on ID_RESC. Clear on read

ID_RESB_LATCH

Set to 1 when an unmasked event occurs on ID_RESB. Clear on read

ID_RESA_LATCH

Set to 1 when an unmasked event occurs on ID_RESA. Clear on read

BVALID_LATCH

Set to 1 when an unmasked event occurs on VB_SESS_VLD. Clear on read

5.4.1.1.34 VENDOR_SPECIFIC3

ADDRESS OFFSET

0x85

PHYSICAL ADDRESS

0x85

INSTANCE

USB_SCUSB

DESCRIPTION

TYPE

WRITE LATENCY

RESERVED

SOF_EN

CPEN_OD

CPEN_ODOS

IDGND_DRV

VUSB3V3_VSEL

BITS

FIELD NAME

DESCRIPTION

TYPE

RESET

Reserved

SOF_EN

0: HS USB SOF detector disabled.

1: Enable HS USB SOF detection when PHY is set in device mode.

SOF are output on CPEN pin. HS USB SOF (start-of-frame) output

clock is available on CPEN pin when this bit is set. HS USB SOF

packet rate is 8 kHz.

This bit is provided for debugging purpose only. It must never been

write to ‘1’ in functional mode

CPEN_OD

This bit has no effect when CPEN_ODOS = ‘0’, else :

0: CPEN pad is in OS (Open Source) mode.

In this case CPEN pin has an internal NMOS driver, and will be active

LOW.

Externally there should be a pullup resistor on CPEN (min 1kohm) to a

supply voltage (max 3.6V).

1: CPEN pad is in OD (Open Drain) mode

In this case CPEN pin has an internal PMOS driver, and will be active

HIGH.

Externally there should be a pull-down resistor on CPEN (min 1 k

Ω to

GND.

CPEN_ODOS

Mode selection bit for CPEN pin.

0 : CPEN pad is in CMOS mode

1: CPEN pad is in OD (Open Drain) or OS (Open Source) mode

(controlled by CPEN_OD bit)

IDGND_DRV

Drives ID pin to ground

0x0

Detailed Description

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