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TUSB1210 Datasheet(PDF) 6 Page - Texas Instruments

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Part # TUSB1210
Description  TUSB1210 Stand-Alone USB Transceiver Chip Silicon
PDF  66 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TUSB1210 Datasheet(HTML) 6 Page - Texas Instruments

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TUSB1210
SLLSE09H – NOVEMBER 2009 – REVISED JUNE 2015
www.ti.com
4
Specifications
4.1
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
VCC
Main battery supply voltage (2)
0
5
V
Where supply represents the voltage applied
Voltage on any input(3)
to the power supply pin associated with the
–0.3
1 × VCC +0.3
V
input
VBUS input
–2
20
V
ID, DP, DM inputs
Stress condition guaranteed 24h
–0.3
5.25
V
VDDIO
IO supply voltage
Continuous
1.98
V
TA
Ambient temperature range
–40
85
°C
Absolute maximum rating
–40
150
TJ
Ambient temperature range
°C
For parametric compliance
–40
125
Ambient temperature for parametric
With max 125°C as junction temperature
–40
85
°C
compliance
DP, DM or ID pins short circuited to VBUS
DP, DM, ID high voltage short circuit
supply, in any mode of TUSB1210 operation,
5.25
V
continuously for 24 hours
DP, DM or ID pins short circuited to GND in
DP, DM, ID low voltage short circuit
any mode of TUSB1210 operation,
0
V
continuously for 24 hours
Tstg
Storage temperature range
–55
125
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Section 4.3 is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The product will have negligible reliability impact if voltage spikes of 5.5 V occur for a total (cumulative over lifetime) duration of 5
milliseconds.
(3)
Except VBAT input, VBUS, ID, DP, and DM pads
4.2
ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS001(1)
±2
Electrostatic discharge (ESD)
V(ESD)
V
performance:
Charged device model (CDM), per JESD22-C101(2)
±500
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
4.3
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VBAT
Battery supply voltage
2.7
3.6
4.8
V
VBAT
When VDD33 is supplied internally
3.15
V
Battery supply voltage for USB 2.0 compliancy
CERT
(USB 2.0 certification)
When VDD33 is shorted to VBAT externally
3.05
VDDIO
Digital IO pin supply
1.71
1.98
V
TA
Ambient temperature range
–40
85
°C
4.4
Thermal Information
PARAMETER
MEASUREMENT METHOD
VALUE
UNIT
θJA
Junction-to-ambient thermal resistance
EIA/JESD 51-1
34.72
°C/W
θJC top
Junction-to-case top thermal resistance(1)
No current JEDEC specification(2)
37.3
°C/W
(1)
Top is surface of the package facing away from the PCB.
(2)
Refer to measurement method in Chapter 2 of IC Package Thermal Metrics (SPRA953).
6
Specifications
Copyright © 2009–2015, Texas Instruments Incorporated
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