SN10501DBVT datasheet(11/23 Pages) TI

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SN10501

SN10502

SN10503

SLOS408A − MARCH 2003 − REVISED DECEMBER 2003

www.ti.com

the

inverting

configuration,

some

key

design

considerations must be noted. One is that the gain resistor

(Rg) becomes part of the signal channel input impedance.

If the input impedance matching is desired (which is

beneficial whenever the signal is coupled through a cable,

twisted pair, long PC board trace, or other transmission

line conductors), Rg may be set equal to the required

termination value and Rf adjusted to give the desired gain.

However, care must be taken when dealing with low

inverting gains, as the resultant feedback resistor value

can present a significant load to the amplifier output. For

an inverting gain of 2, setting Rg to 49.9 Ω for input

matching eliminates the need for RM but requires a 100-Ω

feedback resistor. This has an advantage of the noise gain

becoming equal to 2 for a 50-

Ω source impedance—the

same as the noninverting circuit in Figure 33. However, the

amplifier output now sees the 100-

Ω feedback resistor in

parallel with the external load. To eliminate this excessive

loading, it is preferable to increase both Rg and Rf, values,

as shown in Figure 34, and then achieve the input

matching impedance with a third resistor (RM) to ground.

The

total

input

impedance

becomes

the

parallel

combination of Rg and RM.

The last major consideration to discuss in inverting

amplifier design is setting the bias current cancellation

resistor on the noninverting input. If the resistance is set

equal to the total dc resistance looking out of the inverting

terminal, the output dc error, due to the input bias currents,

is reduced to (input offset current) multiplied by Rf in

Figure 34, the dc source impedance looking out of the

inverting terminal is 1.3 k

Ω || (1.3 kΩ + 25.6 Ω) = 649 Ω.

To reduce the additional high-frequency noise introduced

by the resistor at the noninverting input, and power-supply

feedback, RT is bypassed with a capacitor to ground.

SINGLE SUPPLY OPERATION

The SN1050x family is designed to operate from a single

3-V to 15-V power supply. When operating from a single

power supply, care must be taken to ensure the input

signal and amplifier are biased appropriately to allow for

the maximum output voltage swing. The circuits shown in

Figure 35 demonstrate methods to configure an amplifier

in a manner conducive for single supply operation.

49.9

Ω

Ω Source

+VS

1.3 k

Ω

1.3 k

Ω

+VS

1.3 k

Ω

Ω Source

1.3 k

Ω

52.3

Ω

499

Ω

499

Ω

+VS

Figure 35. DC-Coupled Single Supply Operation

VIDEO DRIVE CIRCUITS

Most video distribution systems are designed with 75-

Ω

series resistors to drive a matched 75-

Ω cable. In order to

deliver a net gain of 1 to the 75-

Ω matched load, the

amplifier is typically set up for a voltage gain of +2,

compensating for the 6-dB attenuation of the voltage

divider formed by the series and shunt 75-

Ω resistors at

either end of the cable. The circuit shown in Figure 36

applies to this requirement. Both the gain flatness and the

differential gain / phase performance of the SN1050x

provides

exceptional

results

video

distribution

applications.

−

Video In

µF

0.1

µF

VS−

Ω

µF

0.1

µF

1.43 k

Ω

1.43 k

Ω

VS+

Figure 36. Cable Drive Application

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